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0
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1 /* Compute different info about registers.
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2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
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3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
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4 2009 Free Software Foundation, Inc.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify it under
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9 the terms of the GNU General Public License as published by the Free
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10 Software Foundation; either version 3, or (at your option) any later
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11 version.
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12
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13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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16 for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22
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23 /* This file contains regscan pass of the compiler and passes for
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24 dealing with info about modes of pseudo-registers inside
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25 subregisters. It also defines some tables of information about the
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26 hardware registers, function init_reg_sets to initialize the
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27 tables, and other auxiliary functions to deal with info about
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28 registers and their classes. */
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29
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30 #include "config.h"
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31 #include "system.h"
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32 #include "coretypes.h"
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33 #include "tm.h"
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34 #include "hard-reg-set.h"
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35 #include "rtl.h"
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36 #include "expr.h"
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37 #include "tm_p.h"
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38 #include "flags.h"
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39 #include "basic-block.h"
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40 #include "regs.h"
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41 #include "addresses.h"
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42 #include "function.h"
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43 #include "insn-config.h"
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44 #include "recog.h"
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45 #include "reload.h"
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46 #include "real.h"
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47 #include "toplev.h"
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48 #include "output.h"
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49 #include "ggc.h"
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50 #include "timevar.h"
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51 #include "hashtab.h"
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52 #include "target.h"
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53 #include "tree-pass.h"
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54 #include "df.h"
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55 #include "ira.h"
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56
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57 /* Maximum register number used in this function, plus one. */
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58
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59 int max_regno;
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60
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61
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62 /* Register tables used by many passes. */
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63
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64 /* Indexed by hard register number, contains 1 for registers
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65 that are fixed use (stack pointer, pc, frame pointer, etc.).
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66 These are the registers that cannot be used to allocate
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67 a pseudo reg for general use. */
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68 char fixed_regs[FIRST_PSEUDO_REGISTER];
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69
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70 /* Same info as a HARD_REG_SET. */
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71 HARD_REG_SET fixed_reg_set;
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72
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73 /* Data for initializing the above. */
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74 static const char initial_fixed_regs[] = FIXED_REGISTERS;
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75
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76 /* Indexed by hard register number, contains 1 for registers
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77 that are fixed use or are clobbered by function calls.
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78 These are the registers that cannot be used to allocate
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79 a pseudo reg whose life crosses calls unless we are able
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80 to save/restore them across the calls. */
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81 char call_used_regs[FIRST_PSEUDO_REGISTER];
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82
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83 /* Same info as a HARD_REG_SET. */
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84 HARD_REG_SET call_used_reg_set;
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85
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86 /* Data for initializing the above. */
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87 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
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88
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89 /* This is much like call_used_regs, except it doesn't have to
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90 be a superset of FIXED_REGISTERS. This vector indicates
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91 what is really call clobbered, and is used when defining
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92 regs_invalidated_by_call. */
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93 #ifdef CALL_REALLY_USED_REGISTERS
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94 char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
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95 #endif
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96
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97 #ifdef CALL_REALLY_USED_REGISTERS
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98 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
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99 #else
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100 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
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101 #endif
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102
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103
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104 /* Indexed by hard register number, contains 1 for registers that are
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105 fixed use or call used registers that cannot hold quantities across
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106 calls even if we are willing to save and restore them. call fixed
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107 registers are a subset of call used registers. */
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108 char call_fixed_regs[FIRST_PSEUDO_REGISTER];
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109
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110 /* The same info as a HARD_REG_SET. */
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111 HARD_REG_SET call_fixed_reg_set;
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112
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113 /* Indexed by hard register number, contains 1 for registers
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114 that are being used for global register decls.
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115 These must be exempt from ordinary flow analysis
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116 and are also considered fixed. */
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117 char global_regs[FIRST_PSEUDO_REGISTER];
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118
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119 /* Contains 1 for registers that are set or clobbered by calls. */
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120 /* ??? Ideally, this would be just call_used_regs plus global_regs, but
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121 for someone's bright idea to have call_used_regs strictly include
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122 fixed_regs. Which leaves us guessing as to the set of fixed_regs
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123 that are actually preserved. We know for sure that those associated
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124 with the local stack frame are safe, but scant others. */
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125 HARD_REG_SET regs_invalidated_by_call;
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126
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127 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
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128 in dataflow more conveniently. */
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129 regset regs_invalidated_by_call_regset;
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130
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131 /* The bitmap_obstack is used to hold some static variables that
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132 should not be reset after each function is compiled. */
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133 static bitmap_obstack persistent_obstack;
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134
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135 /* Table of register numbers in the order in which to try to use them. */
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136 #ifdef REG_ALLOC_ORDER
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137 int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
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138
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139 /* The inverse of reg_alloc_order. */
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140 int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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141 #endif
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142
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143 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
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144 HARD_REG_SET reg_class_contents[N_REG_CLASSES];
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145
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146 /* The same information, but as an array of unsigned ints. We copy from
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147 these unsigned ints to the table above. We do this so the tm.h files
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148 do not have to be aware of the wordsize for machines with <= 64 regs.
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149 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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150 #define N_REG_INTS \
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151 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
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152
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153 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
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154 = REG_CLASS_CONTENTS;
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155
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156 /* For each reg class, number of regs it contains. */
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157 unsigned int reg_class_size[N_REG_CLASSES];
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158
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159 /* For each reg class, table listing all the classes contained in it. */
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160 enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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161
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162 /* For each pair of reg classes,
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163 a largest reg class contained in their union. */
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164 enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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165
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166 /* For each pair of reg classes,
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167 the smallest reg class containing their union. */
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168 enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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169
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170 /* Array containing all of the register names. */
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171 const char * reg_names[] = REGISTER_NAMES;
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172
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173 /* Array containing all of the register class names. */
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174 const char * reg_class_names[] = REG_CLASS_NAMES;
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175
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176 /* For each hard register, the widest mode object that it can contain.
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177 This will be a MODE_INT mode if the register can hold integers. Otherwise
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178 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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179 register. */
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180 enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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181
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182 /* 1 if there is a register of given mode. */
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183 bool have_regs_of_mode [MAX_MACHINE_MODE];
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184
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185 /* 1 if class does contain register of given mode. */
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186 char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
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187
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188 /* Maximum cost of moving from a register in one class to a register in
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189 another class. Based on REGISTER_MOVE_COST. */
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190 move_table *move_cost[MAX_MACHINE_MODE];
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191
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192 /* Similar, but here we don't have to move if the first index is a subset
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193 of the second so in that case the cost is zero. */
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194 move_table *may_move_in_cost[MAX_MACHINE_MODE];
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195
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196 /* Similar, but here we don't have to move if the first index is a superset
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197 of the second so in that case the cost is zero. */
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198 move_table *may_move_out_cost[MAX_MACHINE_MODE];
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199
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200 /* Keep track of the last mode we initialized move costs for. */
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201 static int last_mode_for_init_move_cost;
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202
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203 /* Sample MEM values for use by memory_move_secondary_cost. */
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204 static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
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205
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206 /* No more global register variables may be declared; true once
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207 reginfo has been initialized. */
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208 static int no_global_reg_vars = 0;
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209
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210 /* Specify number of hard registers given machine mode occupy. */
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211 unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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212
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213 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
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214 correspond to the hard registers, if any, set in that map. This
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215 could be done far more efficiently by having all sorts of special-cases
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216 with moving single words, but probably isn't worth the trouble. */
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217 void
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218 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
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219 {
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220 unsigned i;
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221 bitmap_iterator bi;
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222
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223 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
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224 {
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225 if (i >= FIRST_PSEUDO_REGISTER)
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226 return;
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227 SET_HARD_REG_BIT (*to, i);
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228 }
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229 }
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230
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231 /* Function called only once to initialize the above data on reg usage.
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232 Once this is done, various switches may override. */
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233 void
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234 init_reg_sets (void)
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235 {
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236 int i, j;
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237
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238 /* First copy the register information from the initial int form into
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239 the regsets. */
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240
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241 for (i = 0; i < N_REG_CLASSES; i++)
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242 {
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243 CLEAR_HARD_REG_SET (reg_class_contents[i]);
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244
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245 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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246 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
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247 if (int_reg_class_contents[i][j / 32]
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248 & ((unsigned) 1 << (j % 32)))
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249 SET_HARD_REG_BIT (reg_class_contents[i], j);
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250 }
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251
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252 /* Sanity check: make sure the target macros FIXED_REGISTERS and
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253 CALL_USED_REGISTERS had the right number of initializers. */
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254 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
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255 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
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256
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257 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
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258 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
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259 memset (global_regs, 0, sizeof global_regs);
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260 }
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261
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262 /* Initialize may_move_cost and friends for mode M. */
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263 void
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264 init_move_cost (enum machine_mode m)
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265 {
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266 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
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267 bool all_match = true;
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268 unsigned int i, j;
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269
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270 gcc_assert (have_regs_of_mode[m]);
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271 for (i = 0; i < N_REG_CLASSES; i++)
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272 if (contains_reg_of_mode[i][m])
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273 for (j = 0; j < N_REG_CLASSES; j++)
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274 {
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275 int cost;
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276 if (!contains_reg_of_mode[j][m])
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277 cost = 65535;
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278 else
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279 {
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280 cost = REGISTER_MOVE_COST (m, i, j);
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281 gcc_assert (cost < 65535);
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282 }
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283 all_match &= (last_move_cost[i][j] == cost);
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284 last_move_cost[i][j] = cost;
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285 }
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286 if (all_match && last_mode_for_init_move_cost != -1)
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287 {
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288 move_cost[m] = move_cost[last_mode_for_init_move_cost];
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289 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
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290 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
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291 return;
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292 }
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293 last_mode_for_init_move_cost = m;
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294 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
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295 * N_REG_CLASSES);
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296 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
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297 * N_REG_CLASSES);
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298 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
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299 * N_REG_CLASSES);
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300 for (i = 0; i < N_REG_CLASSES; i++)
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301 if (contains_reg_of_mode[i][m])
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302 for (j = 0; j < N_REG_CLASSES; j++)
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303 {
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304 int cost;
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305 enum reg_class *p1, *p2;
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306
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307 if (last_move_cost[i][j] == 65535)
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308 {
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309 move_cost[m][i][j] = 65535;
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310 may_move_in_cost[m][i][j] = 65535;
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311 may_move_out_cost[m][i][j] = 65535;
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312 }
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313 else
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314 {
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315 cost = last_move_cost[i][j];
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316
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317 for (p2 = ®_class_subclasses[j][0];
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318 *p2 != LIM_REG_CLASSES; p2++)
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319 if (*p2 != i && contains_reg_of_mode[*p2][m])
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320 cost = MAX (cost, move_cost[m][i][*p2]);
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321
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322 for (p1 = ®_class_subclasses[i][0];
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323 *p1 != LIM_REG_CLASSES; p1++)
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324 if (*p1 != j && contains_reg_of_mode[*p1][m])
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325 cost = MAX (cost, move_cost[m][*p1][j]);
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326
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327 gcc_assert (cost <= 65535);
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328 move_cost[m][i][j] = cost;
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329
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330 if (reg_class_subset_p (i, j))
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331 may_move_in_cost[m][i][j] = 0;
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332 else
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333 may_move_in_cost[m][i][j] = cost;
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334
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335 if (reg_class_subset_p (j, i))
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336 may_move_out_cost[m][i][j] = 0;
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337 else
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338 may_move_out_cost[m][i][j] = cost;
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339 }
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340 }
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341 else
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342 for (j = 0; j < N_REG_CLASSES; j++)
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343 {
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344 move_cost[m][i][j] = 65535;
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345 may_move_in_cost[m][i][j] = 65535;
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346 may_move_out_cost[m][i][j] = 65535;
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347 }
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348 }
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349
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350 /* We need to save copies of some of the register information which
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351 can be munged by command-line switches so we can restore it during
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352 subsequent back-end reinitialization. */
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353 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
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354 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
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355 #ifdef CALL_REALLY_USED_REGISTERS
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356 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
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357 #endif
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358 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
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359
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360 /* Save the register information. */
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361 void
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362 save_register_info (void)
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363 {
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364 /* Sanity check: make sure the target macros FIXED_REGISTERS and
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365 CALL_USED_REGISTERS had the right number of initializers. */
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366 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
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367 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
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368 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
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369 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
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370
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371 /* Likewise for call_really_used_regs. */
|
|
|
372 #ifdef CALL_REALLY_USED_REGISTERS
|
|
|
373 gcc_assert (sizeof call_really_used_regs
|
|
|
374 == sizeof saved_call_really_used_regs);
|
|
|
375 memcpy (saved_call_really_used_regs, call_really_used_regs,
|
|
|
376 sizeof call_really_used_regs);
|
|
|
377 #endif
|
|
|
378
|
|
|
379 /* And similarly for reg_names. */
|
|
|
380 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
|
|
|
381 memcpy (saved_reg_names, reg_names, sizeof reg_names);
|
|
|
382 }
|
|
|
383
|
|
|
384 /* Restore the register information. */
|
|
|
385 static void
|
|
|
386 restore_register_info (void)
|
|
|
387 {
|
|
|
388 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
|
|
|
389 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
|
|
|
390
|
|
|
391 #ifdef CALL_REALLY_USED_REGISTERS
|
|
|
392 memcpy (call_really_used_regs, saved_call_really_used_regs,
|
|
|
393 sizeof call_really_used_regs);
|
|
|
394 #endif
|
|
|
395
|
|
|
396 memcpy (reg_names, saved_reg_names, sizeof reg_names);
|
|
|
397 }
|
|
|
398
|
|
|
399 /* After switches have been processed, which perhaps alter
|
|
|
400 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
|
|
|
401 static void
|
|
|
402 init_reg_sets_1 (void)
|
|
|
403 {
|
|
|
404 unsigned int i, j;
|
|
|
405 unsigned int /* enum machine_mode */ m;
|
|
|
406
|
|
|
407 restore_register_info ();
|
|
|
408
|
|
|
409 #ifdef REG_ALLOC_ORDER
|
|
|
410 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
411 inv_reg_alloc_order[reg_alloc_order[i]] = i;
|
|
|
412 #endif
|
|
|
413
|
|
|
414 /* This macro allows the fixed or call-used registers
|
|
|
415 and the register classes to depend on target flags. */
|
|
|
416
|
|
|
417 #ifdef CONDITIONAL_REGISTER_USAGE
|
|
|
418 CONDITIONAL_REGISTER_USAGE;
|
|
|
419 #endif
|
|
|
420
|
|
|
421 /* Compute number of hard regs in each class. */
|
|
|
422
|
|
|
423 memset (reg_class_size, 0, sizeof reg_class_size);
|
|
|
424 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
425 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
|
|
426 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
|
|
427 reg_class_size[i]++;
|
|
|
428
|
|
|
429 /* Initialize the table of subunions.
|
|
|
430 reg_class_subunion[I][J] gets the largest-numbered reg-class
|
|
|
431 that is contained in the union of classes I and J. */
|
|
|
432
|
|
|
433 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
|
|
|
434 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
435 {
|
|
|
436 for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
437 {
|
|
|
438 HARD_REG_SET c;
|
|
|
439 int k;
|
|
|
440
|
|
|
441 COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
|
|
442 IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
|
|
443 for (k = 0; k < N_REG_CLASSES; k++)
|
|
|
444 if (hard_reg_set_subset_p (reg_class_contents[k], c)
|
|
|
445 && !hard_reg_set_subset_p (reg_class_contents[k],
|
|
|
446 reg_class_contents
|
|
|
447 [(int) reg_class_subunion[i][j]]))
|
|
|
448 reg_class_subunion[i][j] = (enum reg_class) k;
|
|
|
449 }
|
|
|
450 }
|
|
|
451
|
|
|
452 /* Initialize the table of superunions.
|
|
|
453 reg_class_superunion[I][J] gets the smallest-numbered reg-class
|
|
|
454 containing the union of classes I and J. */
|
|
|
455
|
|
|
456 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
|
|
|
457 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
458 {
|
|
|
459 for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
460 {
|
|
|
461 HARD_REG_SET c;
|
|
|
462 int k;
|
|
|
463
|
|
|
464 COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
|
|
465 IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
|
|
466 for (k = 0; k < N_REG_CLASSES; k++)
|
|
|
467 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
|
|
|
468 break;
|
|
|
469
|
|
|
470 reg_class_superunion[i][j] = (enum reg_class) k;
|
|
|
471 }
|
|
|
472 }
|
|
|
473
|
|
|
474 /* Initialize the tables of subclasses and superclasses of each reg class.
|
|
|
475 First clear the whole table, then add the elements as they are found. */
|
|
|
476
|
|
|
477 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
478 {
|
|
|
479 for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
480 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
|
|
|
481 }
|
|
|
482
|
|
|
483 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
484 {
|
|
|
485 if (i == (int) NO_REGS)
|
|
|
486 continue;
|
|
|
487
|
|
|
488 for (j = i + 1; j < N_REG_CLASSES; j++)
|
|
|
489 if (hard_reg_set_subset_p (reg_class_contents[i],
|
|
|
490 reg_class_contents[j]))
|
|
|
491 {
|
|
|
492 /* Reg class I is a subclass of J.
|
|
|
493 Add J to the table of superclasses of I. */
|
|
|
494 enum reg_class *p;
|
|
|
495
|
|
|
496 /* Add I to the table of superclasses of J. */
|
|
|
497 p = ®_class_subclasses[j][0];
|
|
|
498 while (*p != LIM_REG_CLASSES) p++;
|
|
|
499 *p = (enum reg_class) i;
|
|
|
500 }
|
|
|
501 }
|
|
|
502
|
|
|
503 /* Initialize "constant" tables. */
|
|
|
504
|
|
|
505 CLEAR_HARD_REG_SET (fixed_reg_set);
|
|
|
506 CLEAR_HARD_REG_SET (call_used_reg_set);
|
|
|
507 CLEAR_HARD_REG_SET (call_fixed_reg_set);
|
|
|
508 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
|
|
|
509 if (!regs_invalidated_by_call_regset)
|
|
|
510 {
|
|
|
511 bitmap_obstack_initialize (&persistent_obstack);
|
|
|
512 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
|
|
|
513 }
|
|
|
514 else
|
|
|
515 CLEAR_REG_SET (regs_invalidated_by_call_regset);
|
|
|
516
|
|
|
517 memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
|
|
|
518
|
|
|
519 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
520 {
|
|
|
521 /* call_used_regs must include fixed_regs. */
|
|
|
522 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
|
|
|
523 #ifdef CALL_REALLY_USED_REGISTERS
|
|
|
524 /* call_used_regs must include call_really_used_regs. */
|
|
|
525 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
|
|
|
526 #endif
|
|
|
527
|
|
|
528 if (fixed_regs[i])
|
|
|
529 SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
530
|
|
|
531 if (call_used_regs[i])
|
|
|
532 SET_HARD_REG_BIT (call_used_reg_set, i);
|
|
|
533 if (call_fixed_regs[i])
|
|
|
534 SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
|
|
535
|
|
|
536 /* There are a couple of fixed registers that we know are safe to
|
|
|
537 exclude from being clobbered by calls:
|
|
|
538
|
|
|
539 The frame pointer is always preserved across calls. The arg pointer
|
|
|
540 is if it is fixed. The stack pointer usually is, unless
|
|
|
541 RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
|
|
|
542 If we are generating PIC code, the PIC offset table register is
|
|
|
543 preserved across calls, though the target can override that. */
|
|
|
544
|
|
|
545 if (i == STACK_POINTER_REGNUM)
|
|
|
546 ;
|
|
|
547 else if (global_regs[i])
|
|
|
548 {
|
|
|
549 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
|
|
550 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
|
|
|
551 }
|
|
|
552 else if (i == FRAME_POINTER_REGNUM)
|
|
|
553 ;
|
|
|
554 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
|
|
555 else if (i == HARD_FRAME_POINTER_REGNUM)
|
|
|
556 ;
|
|
|
557 #endif
|
|
|
558 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
|
|
559 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
|
|
|
560 ;
|
|
|
561 #endif
|
|
|
562 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|
|
|
563 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
|
|
|
564 ;
|
|
|
565 #endif
|
|
|
566 else if (CALL_REALLY_USED_REGNO_P (i))
|
|
|
567 {
|
|
|
568 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
|
|
569 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
|
|
|
570 }
|
|
|
571 }
|
|
|
572
|
|
|
573 /* Preserve global registers if called more than once. */
|
|
|
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
575 {
|
|
|
576 if (global_regs[i])
|
|
|
577 {
|
|
|
578 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
|
|
|
579 SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
580 SET_HARD_REG_BIT (call_used_reg_set, i);
|
|
|
581 SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
|
|
582 }
|
|
|
583 }
|
|
|
584
|
|
|
585 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
|
|
|
586 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
|
|
|
587 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
|
|
|
588 {
|
|
|
589 HARD_REG_SET ok_regs;
|
|
|
590 CLEAR_HARD_REG_SET (ok_regs);
|
|
|
591 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
|
|
592 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, m))
|
|
|
593 SET_HARD_REG_BIT (ok_regs, j);
|
|
|
594
|
|
|
595 for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
596 if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i]
|
|
|
597 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
|
|
|
598 {
|
|
|
599 contains_reg_of_mode [i][m] = 1;
|
|
|
600 have_regs_of_mode [m] = 1;
|
|
|
601 }
|
|
|
602 }
|
|
|
603
|
|
|
604 /* Reset move_cost and friends, making sure we only free shared
|
|
|
605 table entries once. */
|
|
|
606 for (i = 0; i < MAX_MACHINE_MODE; i++)
|
|
|
607 if (move_cost[i])
|
|
|
608 {
|
|
|
609 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
|
|
|
610 ;
|
|
|
611 if (i == j)
|
|
|
612 {
|
|
|
613 free (move_cost[i]);
|
|
|
614 free (may_move_in_cost[i]);
|
|
|
615 free (may_move_out_cost[i]);
|
|
|
616 }
|
|
|
617 }
|
|
|
618 memset (move_cost, 0, sizeof move_cost);
|
|
|
619 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
|
|
|
620 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
|
|
|
621 last_mode_for_init_move_cost = -1;
|
|
|
622 }
|
|
|
623
|
|
|
624 /* Compute the table of register modes.
|
|
|
625 These values are used to record death information for individual registers
|
|
|
626 (as opposed to a multi-register mode).
|
|
|
627 This function might be invoked more than once, if the target has support
|
|
|
628 for changing register usage conventions on a per-function basis.
|
|
|
629 */
|
|
|
630 void
|
|
|
631 init_reg_modes_target (void)
|
|
|
632 {
|
|
|
633 int i, j;
|
|
|
634
|
|
|
635 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
636 for (j = 0; j < MAX_MACHINE_MODE; j++)
|
|
|
637 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
|
|
|
638
|
|
|
639 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
640 {
|
|
|
641 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
|
|
|
642
|
|
|
643 /* If we couldn't find a valid mode, just use the previous mode.
|
|
|
644 ??? One situation in which we need to do this is on the mips where
|
|
|
645 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
|
|
|
646 to use DF mode for the even registers and VOIDmode for the odd
|
|
|
647 (for the cpu models where the odd ones are inaccessible). */
|
|
|
648 if (reg_raw_mode[i] == VOIDmode)
|
|
|
649 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
|
|
|
650 }
|
|
|
651 }
|
|
|
652
|
|
|
653 /* Finish initializing the register sets and initialize the register modes.
|
|
|
654 This function might be invoked more than once, if the target has support
|
|
|
655 for changing register usage conventions on a per-function basis.
|
|
|
656 */
|
|
|
657 void
|
|
|
658 init_regs (void)
|
|
|
659 {
|
|
|
660 /* This finishes what was started by init_reg_sets, but couldn't be done
|
|
|
661 until after register usage was specified. */
|
|
|
662 init_reg_sets_1 ();
|
|
|
663 }
|
|
|
664
|
|
|
665 /* The same as previous function plus initializing IRA. */
|
|
|
666 void
|
|
|
667 reinit_regs (void)
|
|
|
668 {
|
|
|
669 init_regs ();
|
|
|
670 ira_init ();
|
|
|
671 }
|
|
|
672
|
|
|
673 /* Initialize some fake stack-frame MEM references for use in
|
|
|
674 memory_move_secondary_cost. */
|
|
|
675 void
|
|
|
676 init_fake_stack_mems (void)
|
|
|
677 {
|
|
|
678 int i;
|
|
|
679
|
|
|
680 for (i = 0; i < MAX_MACHINE_MODE; i++)
|
|
|
681 top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
|
|
|
682 }
|
|
|
683
|
|
|
684
|
|
|
685 /* Compute extra cost of moving registers to/from memory due to reloads.
|
|
|
686 Only needed if secondary reloads are required for memory moves. */
|
|
|
687 int
|
|
|
688 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
|
|
|
689 int in)
|
|
|
690 {
|
|
|
691 enum reg_class altclass;
|
|
|
692 int partial_cost = 0;
|
|
|
693 /* We need a memory reference to feed to SECONDARY... macros. */
|
|
|
694 /* mem may be unused even if the SECONDARY_ macros are defined. */
|
|
|
695 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
|
|
|
696
|
|
|
697 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
|
|
|
698
|
|
|
699 if (altclass == NO_REGS)
|
|
|
700 return 0;
|
|
|
701
|
|
|
702 if (in)
|
|
|
703 partial_cost = REGISTER_MOVE_COST (mode, altclass, rclass);
|
|
|
704 else
|
|
|
705 partial_cost = REGISTER_MOVE_COST (mode, rclass, altclass);
|
|
|
706
|
|
|
707 if (rclass == altclass)
|
|
|
708 /* This isn't simply a copy-to-temporary situation. Can't guess
|
|
|
709 what it is, so MEMORY_MOVE_COST really ought not to be calling
|
|
|
710 here in that case.
|
|
|
711
|
|
|
712 I'm tempted to put in an assert here, but returning this will
|
|
|
713 probably only give poor estimates, which is what we would've
|
|
|
714 had before this code anyways. */
|
|
|
715 return partial_cost;
|
|
|
716
|
|
|
717 /* Check if the secondary reload register will also need a
|
|
|
718 secondary reload. */
|
|
|
719 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
|
|
|
720 }
|
|
|
721
|
|
|
722 /* Return a machine mode that is legitimate for hard reg REGNO and large
|
|
|
723 enough to save nregs. If we can't find one, return VOIDmode.
|
|
|
724 If CALL_SAVED is true, only consider modes that are call saved. */
|
|
|
725 enum machine_mode
|
|
|
726 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
|
|
|
727 unsigned int nregs, bool call_saved)
|
|
|
728 {
|
|
|
729 unsigned int /* enum machine_mode */ m;
|
|
|
730 enum machine_mode found_mode = VOIDmode, mode;
|
|
|
731
|
|
|
732 /* We first look for the largest integer mode that can be validly
|
|
|
733 held in REGNO. If none, we look for the largest floating-point mode.
|
|
|
734 If we still didn't find a valid mode, try CCmode. */
|
|
|
735
|
|
|
736 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
|
|
|
737 mode != VOIDmode;
|
|
|
738 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
739 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
|
|
740 && HARD_REGNO_MODE_OK (regno, mode)
|
|
|
741 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
|
|
742 found_mode = mode;
|
|
|
743
|
|
|
744 if (found_mode != VOIDmode)
|
|
|
745 return found_mode;
|
|
|
746
|
|
|
747 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
|
|
|
748 mode != VOIDmode;
|
|
|
749 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
750 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
|
|
751 && HARD_REGNO_MODE_OK (regno, mode)
|
|
|
752 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
|
|
753 found_mode = mode;
|
|
|
754
|
|
|
755 if (found_mode != VOIDmode)
|
|
|
756 return found_mode;
|
|
|
757
|
|
|
758 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
|
|
|
759 mode != VOIDmode;
|
|
|
760 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
761 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
|
|
762 && HARD_REGNO_MODE_OK (regno, mode)
|
|
|
763 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
|
|
764 found_mode = mode;
|
|
|
765
|
|
|
766 if (found_mode != VOIDmode)
|
|
|
767 return found_mode;
|
|
|
768
|
|
|
769 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
|
|
|
770 mode != VOIDmode;
|
|
|
771 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
772 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
|
|
773 && HARD_REGNO_MODE_OK (regno, mode)
|
|
|
774 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
|
|
775 found_mode = mode;
|
|
|
776
|
|
|
777 if (found_mode != VOIDmode)
|
|
|
778 return found_mode;
|
|
|
779
|
|
|
780 /* Iterate over all of the CCmodes. */
|
|
|
781 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
|
|
|
782 {
|
|
|
783 mode = (enum machine_mode) m;
|
|
|
784 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
|
|
785 && HARD_REGNO_MODE_OK (regno, mode)
|
|
|
786 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
|
|
787 return mode;
|
|
|
788 }
|
|
|
789
|
|
|
790 /* We can't find a mode valid for this register. */
|
|
|
791 return VOIDmode;
|
|
|
792 }
|
|
|
793
|
|
|
794 /* Specify the usage characteristics of the register named NAME.
|
|
|
795 It should be a fixed register if FIXED and a
|
|
|
796 call-used register if CALL_USED. */
|
|
|
797 void
|
|
|
798 fix_register (const char *name, int fixed, int call_used)
|
|
|
799 {
|
|
|
800 int i;
|
|
|
801
|
|
|
802 /* Decode the name and update the primary form of
|
|
|
803 the register info. */
|
|
|
804
|
|
|
805 if ((i = decode_reg_name (name)) >= 0)
|
|
|
806 {
|
|
|
807 if ((i == STACK_POINTER_REGNUM
|
|
|
808 #ifdef HARD_FRAME_POINTER_REGNUM
|
|
|
809 || i == HARD_FRAME_POINTER_REGNUM
|
|
|
810 #else
|
|
|
811 || i == FRAME_POINTER_REGNUM
|
|
|
812 #endif
|
|
|
813 )
|
|
|
814 && (fixed == 0 || call_used == 0))
|
|
|
815 {
|
|
|
816 static const char * const what_option[2][2] = {
|
|
|
817 { "call-saved", "call-used" },
|
|
|
818 { "no-such-option", "fixed" }};
|
|
|
819
|
|
|
820 error ("can't use '%s' as a %s register", name,
|
|
|
821 what_option[fixed][call_used]);
|
|
|
822 }
|
|
|
823 else
|
|
|
824 {
|
|
|
825 fixed_regs[i] = fixed;
|
|
|
826 call_used_regs[i] = call_used;
|
|
|
827 #ifdef CALL_REALLY_USED_REGISTERS
|
|
|
828 if (fixed == 0)
|
|
|
829 call_really_used_regs[i] = call_used;
|
|
|
830 #endif
|
|
|
831 }
|
|
|
832 }
|
|
|
833 else
|
|
|
834 {
|
|
|
835 warning (0, "unknown register name: %s", name);
|
|
|
836 }
|
|
|
837 }
|
|
|
838
|
|
|
839 /* Mark register number I as global. */
|
|
|
840 void
|
|
|
841 globalize_reg (int i)
|
|
|
842 {
|
|
|
843 if (fixed_regs[i] == 0 && no_global_reg_vars)
|
|
|
844 error ("global register variable follows a function definition");
|
|
|
845
|
|
|
846 if (global_regs[i])
|
|
|
847 {
|
|
|
848 warning (0, "register used for two global register variables");
|
|
|
849 return;
|
|
|
850 }
|
|
|
851
|
|
|
852 if (call_used_regs[i] && ! fixed_regs[i])
|
|
|
853 warning (0, "call-clobbered register used for global register variable");
|
|
|
854
|
|
|
855 global_regs[i] = 1;
|
|
|
856
|
|
|
857 /* If we're globalizing the frame pointer, we need to set the
|
|
|
858 appropriate regs_invalidated_by_call bit, even if it's already
|
|
|
859 set in fixed_regs. */
|
|
|
860 if (i != STACK_POINTER_REGNUM)
|
|
|
861 {
|
|
|
862 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
|
|
863 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
|
|
|
864 }
|
|
|
865
|
|
|
866 /* If already fixed, nothing else to do. */
|
|
|
867 if (fixed_regs[i])
|
|
|
868 return;
|
|
|
869
|
|
|
870 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
|
|
|
871 #ifdef CALL_REALLY_USED_REGISTERS
|
|
|
872 call_really_used_regs[i] = 1;
|
|
|
873 #endif
|
|
|
874
|
|
|
875 SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
876 SET_HARD_REG_BIT (call_used_reg_set, i);
|
|
|
877 SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
|
|
878
|
|
|
879 reinit_regs ();
|
|
|
880 }
|
|
|
881
|
|
|
882
|
|
|
883 /* Structure used to record preferences of given pseudo. */
|
|
|
884 struct reg_pref
|
|
|
885 {
|
|
|
886 /* (enum reg_class) prefclass is the preferred class. May be
|
|
|
887 NO_REGS if no class is better than memory. */
|
|
|
888 char prefclass;
|
|
|
889
|
|
|
890 /* altclass is a register class that we should use for allocating
|
|
|
891 pseudo if no register in the preferred class is available.
|
|
|
892 If no register in this class is available, memory is preferred.
|
|
|
893
|
|
|
894 It might appear to be more general to have a bitmask of classes here,
|
|
|
895 but since it is recommended that there be a class corresponding to the
|
|
|
896 union of most major pair of classes, that generality is not required. */
|
|
|
897 char altclass;
|
|
|
898 };
|
|
|
899
|
|
|
900 /* Record preferences of each pseudo. This is available after RA is
|
|
|
901 run. */
|
|
|
902 static struct reg_pref *reg_pref;
|
|
|
903
|
|
|
904 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
|
|
|
905 This function is sometimes called before the info has been computed.
|
|
|
906 When that happens, just return GENERAL_REGS, which is innocuous. */
|
|
|
907 enum reg_class
|
|
|
908 reg_preferred_class (int regno)
|
|
|
909 {
|
|
|
910 if (reg_pref == 0)
|
|
|
911 return GENERAL_REGS;
|
|
|
912
|
|
|
913 return (enum reg_class) reg_pref[regno].prefclass;
|
|
|
914 }
|
|
|
915
|
|
|
916 enum reg_class
|
|
|
917 reg_alternate_class (int regno)
|
|
|
918 {
|
|
|
919 if (reg_pref == 0)
|
|
|
920 return ALL_REGS;
|
|
|
921
|
|
|
922 return (enum reg_class) reg_pref[regno].altclass;
|
|
|
923 }
|
|
|
924
|
|
|
925 /* Initialize some global data for this pass. */
|
|
|
926 static unsigned int
|
|
|
927 reginfo_init (void)
|
|
|
928 {
|
|
|
929 if (df)
|
|
|
930 df_compute_regs_ever_live (true);
|
|
|
931
|
|
|
932 /* This prevents dump_flow_info from losing if called
|
|
|
933 before reginfo is run. */
|
|
|
934 reg_pref = NULL;
|
|
|
935
|
|
|
936 /* No more global register variables may be declared. */
|
|
|
937 no_global_reg_vars = 1;
|
|
|
938 return 1;
|
|
|
939 }
|
|
|
940
|
|
|
941 struct rtl_opt_pass pass_reginfo_init =
|
|
|
942 {
|
|
|
943 {
|
|
|
944 RTL_PASS,
|
|
|
945 "reginfo", /* name */
|
|
|
946 NULL, /* gate */
|
|
|
947 reginfo_init, /* execute */
|
|
|
948 NULL, /* sub */
|
|
|
949 NULL, /* next */
|
|
|
950 0, /* static_pass_number */
|
|
|
951 0, /* tv_id */
|
|
|
952 0, /* properties_required */
|
|
|
953 0, /* properties_provided */
|
|
|
954 0, /* properties_destroyed */
|
|
|
955 0, /* todo_flags_start */
|
|
|
956 0 /* todo_flags_finish */
|
|
|
957 }
|
|
|
958 };
|
|
|
959
|
|
|
960
|
|
|
961
|
|
|
962 /* Allocate space for reg info. */
|
|
|
963 void
|
|
|
964 allocate_reg_info (void)
|
|
|
965 {
|
|
|
966 int size = max_reg_num ();
|
|
|
967
|
|
|
968 gcc_assert (! reg_pref && ! reg_renumber);
|
|
|
969 reg_renumber = XNEWVEC (short, size);
|
|
|
970 reg_pref = XCNEWVEC (struct reg_pref, size);
|
|
|
971 memset (reg_renumber, -1, size * sizeof (short));
|
|
|
972 }
|
|
|
973
|
|
|
974
|
|
|
975 /* Resize reg info. The new elements will be uninitialized. */
|
|
|
976 void
|
|
|
977 resize_reg_info (void)
|
|
|
978 {
|
|
|
979 int size = max_reg_num ();
|
|
|
980
|
|
|
981 gcc_assert (reg_pref && reg_renumber);
|
|
|
982 reg_renumber = XRESIZEVEC (short, reg_renumber, size);
|
|
|
983 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, size);
|
|
|
984 }
|
|
|
985
|
|
|
986
|
|
|
987 /* Free up the space allocated by allocate_reg_info. */
|
|
|
988 void
|
|
|
989 free_reg_info (void)
|
|
|
990 {
|
|
|
991 if (reg_pref)
|
|
|
992 {
|
|
|
993 free (reg_pref);
|
|
|
994 reg_pref = NULL;
|
|
|
995 }
|
|
|
996
|
|
|
997 if (reg_renumber)
|
|
|
998 {
|
|
|
999 free (reg_renumber);
|
|
|
1000 reg_renumber = NULL;
|
|
|
1001 }
|
|
|
1002 }
|
|
|
1003
|
|
|
1004
|
|
|
1005
|
|
|
1006
|
|
|
1007 /* Set up preferred and alternate classes for REGNO as PREFCLASS and
|
|
|
1008 ALTCLASS. */
|
|
|
1009 void
|
|
|
1010 setup_reg_classes (int regno,
|
|
|
1011 enum reg_class prefclass, enum reg_class altclass)
|
|
|
1012 {
|
|
|
1013 if (reg_pref == NULL)
|
|
|
1014 return;
|
|
|
1015 reg_pref[regno].prefclass = prefclass;
|
|
|
1016 reg_pref[regno].altclass = altclass;
|
|
|
1017 }
|
|
|
1018
|
|
|
1019
|
|
|
1020 /* This is the `regscan' pass of the compiler, run just before cse and
|
|
|
1021 again just before loop. It finds the first and last use of each
|
|
|
1022 pseudo-register. */
|
|
|
1023
|
|
|
1024 static void reg_scan_mark_refs (rtx, rtx);
|
|
|
1025
|
|
|
1026 void
|
|
|
1027 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
|
|
|
1028 {
|
|
|
1029 rtx insn;
|
|
|
1030
|
|
|
1031 timevar_push (TV_REG_SCAN);
|
|
|
1032
|
|
|
1033 for (insn = f; insn; insn = NEXT_INSN (insn))
|
|
|
1034 if (INSN_P (insn))
|
|
|
1035 {
|
|
|
1036 reg_scan_mark_refs (PATTERN (insn), insn);
|
|
|
1037 if (REG_NOTES (insn))
|
|
|
1038 reg_scan_mark_refs (REG_NOTES (insn), insn);
|
|
|
1039 }
|
|
|
1040
|
|
|
1041 timevar_pop (TV_REG_SCAN);
|
|
|
1042 }
|
|
|
1043
|
|
|
1044
|
|
|
1045 /* X is the expression to scan. INSN is the insn it appears in.
|
|
|
1046 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
|
|
|
1047 We should only record information for REGs with numbers
|
|
|
1048 greater than or equal to MIN_REGNO. */
|
|
|
1049 static void
|
|
|
1050 reg_scan_mark_refs (rtx x, rtx insn)
|
|
|
1051 {
|
|
|
1052 enum rtx_code code;
|
|
|
1053 rtx dest;
|
|
|
1054 rtx note;
|
|
|
1055
|
|
|
1056 if (!x)
|
|
|
1057 return;
|
|
|
1058 code = GET_CODE (x);
|
|
|
1059 switch (code)
|
|
|
1060 {
|
|
|
1061 case CONST:
|
|
|
1062 case CONST_INT:
|
|
|
1063 case CONST_DOUBLE:
|
|
|
1064 case CONST_FIXED:
|
|
|
1065 case CONST_VECTOR:
|
|
|
1066 case CC0:
|
|
|
1067 case PC:
|
|
|
1068 case SYMBOL_REF:
|
|
|
1069 case LABEL_REF:
|
|
|
1070 case ADDR_VEC:
|
|
|
1071 case ADDR_DIFF_VEC:
|
|
|
1072 case REG:
|
|
|
1073 return;
|
|
|
1074
|
|
|
1075 case EXPR_LIST:
|
|
|
1076 if (XEXP (x, 0))
|
|
|
1077 reg_scan_mark_refs (XEXP (x, 0), insn);
|
|
|
1078 if (XEXP (x, 1))
|
|
|
1079 reg_scan_mark_refs (XEXP (x, 1), insn);
|
|
|
1080 break;
|
|
|
1081
|
|
|
1082 case INSN_LIST:
|
|
|
1083 if (XEXP (x, 1))
|
|
|
1084 reg_scan_mark_refs (XEXP (x, 1), insn);
|
|
|
1085 break;
|
|
|
1086
|
|
|
1087 case CLOBBER:
|
|
|
1088 if (MEM_P (XEXP (x, 0)))
|
|
|
1089 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
|
|
|
1090 break;
|
|
|
1091
|
|
|
1092 case SET:
|
|
|
1093 /* Count a set of the destination if it is a register. */
|
|
|
1094 for (dest = SET_DEST (x);
|
|
|
1095 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
|
|
|
1096 || GET_CODE (dest) == ZERO_EXTEND;
|
|
|
1097 dest = XEXP (dest, 0))
|
|
|
1098 ;
|
|
|
1099
|
|
|
1100 /* If this is setting a pseudo from another pseudo or the sum of a
|
|
|
1101 pseudo and a constant integer and the other pseudo is known to be
|
|
|
1102 a pointer, set the destination to be a pointer as well.
|
|
|
1103
|
|
|
1104 Likewise if it is setting the destination from an address or from a
|
|
|
1105 value equivalent to an address or to the sum of an address and
|
|
|
1106 something else.
|
|
|
1107
|
|
|
1108 But don't do any of this if the pseudo corresponds to a user
|
|
|
1109 variable since it should have already been set as a pointer based
|
|
|
1110 on the type. */
|
|
|
1111
|
|
|
1112 if (REG_P (SET_DEST (x))
|
|
|
1113 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
|
|
|
1114 /* If the destination pseudo is set more than once, then other
|
|
|
1115 sets might not be to a pointer value (consider access to a
|
|
|
1116 union in two threads of control in the presence of global
|
|
|
1117 optimizations). So only set REG_POINTER on the destination
|
|
|
1118 pseudo if this is the only set of that pseudo. */
|
|
|
1119 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
|
|
|
1120 && ! REG_USERVAR_P (SET_DEST (x))
|
|
|
1121 && ! REG_POINTER (SET_DEST (x))
|
|
|
1122 && ((REG_P (SET_SRC (x))
|
|
|
1123 && REG_POINTER (SET_SRC (x)))
|
|
|
1124 || ((GET_CODE (SET_SRC (x)) == PLUS
|
|
|
1125 || GET_CODE (SET_SRC (x)) == LO_SUM)
|
|
|
1126 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
|
|
|
1127 && REG_P (XEXP (SET_SRC (x), 0))
|
|
|
1128 && REG_POINTER (XEXP (SET_SRC (x), 0)))
|
|
|
1129 || GET_CODE (SET_SRC (x)) == CONST
|
|
|
1130 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
|
|
|
1131 || GET_CODE (SET_SRC (x)) == LABEL_REF
|
|
|
1132 || (GET_CODE (SET_SRC (x)) == HIGH
|
|
|
1133 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
|
|
|
1134 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
|
|
|
1135 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
|
|
|
1136 || ((GET_CODE (SET_SRC (x)) == PLUS
|
|
|
1137 || GET_CODE (SET_SRC (x)) == LO_SUM)
|
|
|
1138 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
|
|
|
1139 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
|
|
|
1140 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
|
|
|
1141 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
|
|
|
1142 && (GET_CODE (XEXP (note, 0)) == CONST
|
|
|
1143 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|
|
|
1144 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
|
|
|
1145 REG_POINTER (SET_DEST (x)) = 1;
|
|
|
1146
|
|
|
1147 /* If this is setting a register from a register or from a simple
|
|
|
1148 conversion of a register, propagate REG_EXPR. */
|
|
|
1149 if (REG_P (dest) && !REG_ATTRS (dest))
|
|
|
1150 {
|
|
|
1151 rtx src = SET_SRC (x);
|
|
|
1152
|
|
|
1153 while (GET_CODE (src) == SIGN_EXTEND
|
|
|
1154 || GET_CODE (src) == ZERO_EXTEND
|
|
|
1155 || GET_CODE (src) == TRUNCATE
|
|
|
1156 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
|
|
|
1157 src = XEXP (src, 0);
|
|
|
1158
|
|
|
1159 set_reg_attrs_from_value (dest, src);
|
|
|
1160 }
|
|
|
1161
|
|
|
1162 /* ... fall through ... */
|
|
|
1163
|
|
|
1164 default:
|
|
|
1165 {
|
|
|
1166 const char *fmt = GET_RTX_FORMAT (code);
|
|
|
1167 int i;
|
|
|
1168 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|
|
1169 {
|
|
|
1170 if (fmt[i] == 'e')
|
|
|
1171 reg_scan_mark_refs (XEXP (x, i), insn);
|
|
|
1172 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
|
|
|
1173 {
|
|
|
1174 int j;
|
|
|
1175 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
|
|
1176 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
|
|
|
1177 }
|
|
|
1178 }
|
|
|
1179 }
|
|
|
1180 }
|
|
|
1181 }
|
|
|
1182
|
|
|
1183
|
|
|
1184 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
|
|
|
1185 is also in C2. */
|
|
|
1186 int
|
|
|
1187 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
|
|
|
1188 {
|
|
|
1189 return (c1 == c2
|
|
|
1190 || c2 == ALL_REGS
|
|
|
1191 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
|
|
|
1192 reg_class_contents[(int) c2]));
|
|
|
1193 }
|
|
|
1194
|
|
|
1195 /* Return nonzero if there is a register that is in both C1 and C2. */
|
|
|
1196 int
|
|
|
1197 reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
|
|
|
1198 {
|
|
|
1199 return (c1 == c2
|
|
|
1200 || c1 == ALL_REGS
|
|
|
1201 || c2 == ALL_REGS
|
|
|
1202 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
|
|
|
1203 reg_class_contents[(int) c2]));
|
|
|
1204 }
|
|
|
1205
|
|
|
1206
|
|
|
1207
|
|
|
1208 /* Passes for keeping and updating info about modes of registers
|
|
|
1209 inside subregisters. */
|
|
|
1210
|
|
|
1211 #ifdef CANNOT_CHANGE_MODE_CLASS
|
|
|
1212
|
|
|
1213 struct subregs_of_mode_node
|
|
|
1214 {
|
|
|
1215 unsigned int block;
|
|
|
1216 unsigned char modes[MAX_MACHINE_MODE];
|
|
|
1217 };
|
|
|
1218
|
|
|
1219 static htab_t subregs_of_mode;
|
|
|
1220
|
|
|
1221 static hashval_t
|
|
|
1222 som_hash (const void *x)
|
|
|
1223 {
|
|
|
1224 const struct subregs_of_mode_node *const a =
|
|
|
1225 (const struct subregs_of_mode_node *) x;
|
|
|
1226 return a->block;
|
|
|
1227 }
|
|
|
1228
|
|
|
1229 static int
|
|
|
1230 som_eq (const void *x, const void *y)
|
|
|
1231 {
|
|
|
1232 const struct subregs_of_mode_node *const a =
|
|
|
1233 (const struct subregs_of_mode_node *) x;
|
|
|
1234 const struct subregs_of_mode_node *const b =
|
|
|
1235 (const struct subregs_of_mode_node *) y;
|
|
|
1236 return a->block == b->block;
|
|
|
1237 }
|
|
|
1238
|
|
|
1239 static void
|
|
|
1240 record_subregs_of_mode (rtx subreg)
|
|
|
1241 {
|
|
|
1242 struct subregs_of_mode_node dummy, *node;
|
|
|
1243 enum machine_mode mode;
|
|
|
1244 unsigned int regno;
|
|
|
1245 void **slot;
|
|
|
1246
|
|
|
1247 if (!REG_P (SUBREG_REG (subreg)))
|
|
|
1248 return;
|
|
|
1249
|
|
|
1250 regno = REGNO (SUBREG_REG (subreg));
|
|
|
1251 mode = GET_MODE (subreg);
|
|
|
1252
|
|
|
1253 if (regno < FIRST_PSEUDO_REGISTER)
|
|
|
1254 return;
|
|
|
1255
|
|
|
1256 dummy.block = regno & -8;
|
|
|
1257 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
|
|
|
1258 dummy.block, INSERT);
|
|
|
1259 node = (struct subregs_of_mode_node *) *slot;
|
|
|
1260 if (node == NULL)
|
|
|
1261 {
|
|
|
1262 node = XCNEW (struct subregs_of_mode_node);
|
|
|
1263 node->block = regno & -8;
|
|
|
1264 *slot = node;
|
|
|
1265 }
|
|
|
1266
|
|
|
1267 node->modes[mode] |= 1 << (regno & 7);
|
|
|
1268 }
|
|
|
1269
|
|
|
1270 /* Call record_subregs_of_mode for all the subregs in X. */
|
|
|
1271 static void
|
|
|
1272 find_subregs_of_mode (rtx x)
|
|
|
1273 {
|
|
|
1274 enum rtx_code code = GET_CODE (x);
|
|
|
1275 const char * const fmt = GET_RTX_FORMAT (code);
|
|
|
1276 int i;
|
|
|
1277
|
|
|
1278 if (code == SUBREG)
|
|
|
1279 record_subregs_of_mode (x);
|
|
|
1280
|
|
|
1281 /* Time for some deep diving. */
|
|
|
1282 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|
|
1283 {
|
|
|
1284 if (fmt[i] == 'e')
|
|
|
1285 find_subregs_of_mode (XEXP (x, i));
|
|
|
1286 else if (fmt[i] == 'E')
|
|
|
1287 {
|
|
|
1288 int j;
|
|
|
1289 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
|
|
1290 find_subregs_of_mode (XVECEXP (x, i, j));
|
|
|
1291 }
|
|
|
1292 }
|
|
|
1293 }
|
|
|
1294
|
|
|
1295 static unsigned int
|
|
|
1296 init_subregs_of_mode (void)
|
|
|
1297 {
|
|
|
1298 basic_block bb;
|
|
|
1299 rtx insn;
|
|
|
1300
|
|
|
1301 if (subregs_of_mode)
|
|
|
1302 htab_empty (subregs_of_mode);
|
|
|
1303 else
|
|
|
1304 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
|
|
|
1305
|
|
|
1306 FOR_EACH_BB (bb)
|
|
|
1307 FOR_BB_INSNS (bb, insn)
|
|
|
1308 if (INSN_P (insn))
|
|
|
1309 find_subregs_of_mode (PATTERN (insn));
|
|
|
1310
|
|
|
1311 return 0;
|
|
|
1312 }
|
|
|
1313
|
|
|
1314 /* Set bits in *USED which correspond to registers which can't change
|
|
|
1315 their mode from FROM to any mode in which REGNO was
|
|
|
1316 encountered. */
|
|
|
1317 void
|
|
|
1318 cannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from,
|
|
|
1319 unsigned int regno)
|
|
|
1320 {
|
|
|
1321 struct subregs_of_mode_node dummy, *node;
|
|
|
1322 enum machine_mode to;
|
|
|
1323 unsigned char mask;
|
|
|
1324 unsigned int i;
|
|
|
1325
|
|
|
1326 gcc_assert (subregs_of_mode);
|
|
|
1327 dummy.block = regno & -8;
|
|
|
1328 node = (struct subregs_of_mode_node *)
|
|
|
1329 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
|
|
1330 if (node == NULL)
|
|
|
1331 return;
|
|
|
1332
|
|
|
1333 mask = 1 << (regno & 7);
|
|
|
1334 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
|
|
1335 if (node->modes[to] & mask)
|
|
|
1336 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
1337 if (!TEST_HARD_REG_BIT (*used, i)
|
|
|
1338 && REG_CANNOT_CHANGE_MODE_P (i, from, to))
|
|
|
1339 SET_HARD_REG_BIT (*used, i);
|
|
|
1340 }
|
|
|
1341
|
|
|
1342 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
|
|
|
1343 mode. */
|
|
|
1344 bool
|
|
|
1345 invalid_mode_change_p (unsigned int regno,
|
|
|
1346 enum reg_class rclass ATTRIBUTE_UNUSED,
|
|
|
1347 enum machine_mode from)
|
|
|
1348 {
|
|
|
1349 struct subregs_of_mode_node dummy, *node;
|
|
|
1350 enum machine_mode to;
|
|
|
1351 unsigned char mask;
|
|
|
1352
|
|
|
1353 gcc_assert (subregs_of_mode);
|
|
|
1354 dummy.block = regno & -8;
|
|
|
1355 node = (struct subregs_of_mode_node *)
|
|
|
1356 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
|
|
1357 if (node == NULL)
|
|
|
1358 return false;
|
|
|
1359
|
|
|
1360 mask = 1 << (regno & 7);
|
|
|
1361 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
|
|
1362 if (node->modes[to] & mask)
|
|
|
1363 if (CANNOT_CHANGE_MODE_CLASS (from, to, rclass))
|
|
|
1364 return true;
|
|
|
1365
|
|
|
1366 return false;
|
|
|
1367 }
|
|
|
1368
|
|
|
1369 static unsigned int
|
|
|
1370 finish_subregs_of_mode (void)
|
|
|
1371 {
|
|
|
1372 htab_delete (subregs_of_mode);
|
|
|
1373 subregs_of_mode = 0;
|
|
|
1374 return 0;
|
|
|
1375 }
|
|
|
1376 #else
|
|
|
1377 static unsigned int
|
|
|
1378 init_subregs_of_mode (void)
|
|
|
1379 {
|
|
|
1380 return 0;
|
|
|
1381 }
|
|
|
1382 static unsigned int
|
|
|
1383 finish_subregs_of_mode (void)
|
|
|
1384 {
|
|
|
1385 return 0;
|
|
|
1386 }
|
|
|
1387
|
|
|
1388 #endif /* CANNOT_CHANGE_MODE_CLASS */
|
|
|
1389
|
|
|
1390 static bool
|
|
|
1391 gate_subregs_of_mode_init (void)
|
|
|
1392 {
|
|
|
1393 #ifdef CANNOT_CHANGE_MODE_CLASS
|
|
|
1394 return true;
|
|
|
1395 #else
|
|
|
1396 return false;
|
|
|
1397 #endif
|
|
|
1398 }
|
|
|
1399
|
|
|
1400 struct rtl_opt_pass pass_subregs_of_mode_init =
|
|
|
1401 {
|
|
|
1402 {
|
|
|
1403 RTL_PASS,
|
|
|
1404 "subregs_of_mode_init", /* name */
|
|
|
1405 gate_subregs_of_mode_init, /* gate */
|
|
|
1406 init_subregs_of_mode, /* execute */
|
|
|
1407 NULL, /* sub */
|
|
|
1408 NULL, /* next */
|
|
|
1409 0, /* static_pass_number */
|
|
|
1410 0, /* tv_id */
|
|
|
1411 0, /* properties_required */
|
|
|
1412 0, /* properties_provided */
|
|
|
1413 0, /* properties_destroyed */
|
|
|
1414 0, /* todo_flags_start */
|
|
|
1415 0 /* todo_flags_finish */
|
|
|
1416 }
|
|
|
1417 };
|
|
|
1418
|
|
|
1419 struct rtl_opt_pass pass_subregs_of_mode_finish =
|
|
|
1420 {
|
|
|
1421 {
|
|
|
1422 RTL_PASS,
|
|
|
1423 "subregs_of_mode_finish", /* name */
|
|
|
1424 gate_subregs_of_mode_init, /* gate */
|
|
|
1425 finish_subregs_of_mode, /* execute */
|
|
|
1426 NULL, /* sub */
|
|
|
1427 NULL, /* next */
|
|
|
1428 0, /* static_pass_number */
|
|
|
1429 0, /* tv_id */
|
|
|
1430 0, /* properties_required */
|
|
|
1431 0, /* properties_provided */
|
|
|
1432 0, /* properties_destroyed */
|
|
|
1433 0, /* todo_flags_start */
|
|
|
1434 0 /* todo_flags_finish */
|
|
|
1435 }
|
|
|
1436 };
|
|
|
1437
|
|
|
1438
|
|
|
1439 #include "gt-reginfo.h"
|
