|
0
|
1 /* This file contains the definitions and documentation for the
|
|
|
2 Register Transfer Expressions (rtx's) that make up the
|
|
|
3 Register Transfer Language (rtl) used in the Back End of the GNU compiler.
|
|
|
4 Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
|
|
|
5 2005, 2006, 2007, 2008
|
|
|
6 Free Software Foundation, Inc.
|
|
|
7
|
|
|
8 This file is part of GCC.
|
|
|
9
|
|
|
10 GCC is free software; you can redistribute it and/or modify it under
|
|
|
11 the terms of the GNU General Public License as published by the Free
|
|
|
12 Software Foundation; either version 3, or (at your option) any later
|
|
|
13 version.
|
|
|
14
|
|
|
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
|
|
|
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
|
|
18 for more details.
|
|
|
19
|
|
|
20 You should have received a copy of the GNU General Public License
|
|
|
21 along with GCC; see the file COPYING3. If not see
|
|
|
22 <http://www.gnu.org/licenses/>. */
|
|
|
23
|
|
|
24
|
|
|
25 /* Expression definitions and descriptions for all targets are in this file.
|
|
|
26 Some will not be used for some targets.
|
|
|
27
|
|
|
28 The fields in the cpp macro call "DEF_RTL_EXPR()"
|
|
|
29 are used to create declarations in the C source of the compiler.
|
|
|
30
|
|
|
31 The fields are:
|
|
|
32
|
|
|
33 1. The internal name of the rtx used in the C source.
|
|
|
34 It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
|
|
|
35 By convention these are in UPPER_CASE.
|
|
|
36
|
|
|
37 2. The name of the rtx in the external ASCII format read by
|
|
|
38 read_rtx(), and printed by print_rtx().
|
|
|
39 These names are stored in rtx_name[].
|
|
|
40 By convention these are the internal (field 1) names in lower_case.
|
|
|
41
|
|
|
42 3. The print format, and type of each rtx->u.fld[] (field) in this rtx.
|
|
|
43 These formats are stored in rtx_format[].
|
|
|
44 The meaning of the formats is documented in front of this array in rtl.c
|
|
|
45
|
|
|
46 4. The class of the rtx. These are stored in rtx_class and are accessed
|
|
|
47 via the GET_RTX_CLASS macro. They are defined as follows:
|
|
|
48
|
|
|
49 RTX_CONST_OBJ
|
|
|
50 an rtx code that can be used to represent a constant object
|
|
|
51 (e.g, CONST_INT)
|
|
|
52 RTX_OBJ
|
|
|
53 an rtx code that can be used to represent an object (e.g, REG, MEM)
|
|
|
54 RTX_COMPARE
|
|
|
55 an rtx code for a comparison (e.g, LT, GT)
|
|
|
56 RTX_COMM_COMPARE
|
|
|
57 an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED)
|
|
|
58 RTX_UNARY
|
|
|
59 an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
|
|
|
60 RTX_COMM_ARITH
|
|
|
61 an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
|
|
|
62 RTX_TERNARY
|
|
|
63 an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
|
|
|
64 RTX_BIN_ARITH
|
|
|
65 an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
|
|
|
66 RTX_BITFIELD_OPS
|
|
|
67 an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
|
|
|
68 RTX_INSN
|
|
|
69 an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
|
|
|
70 RTX_MATCH
|
|
|
71 an rtx code for something that matches in insns (e.g, MATCH_DUP)
|
|
|
72 RTX_AUTOINC
|
|
|
73 an rtx code for autoincrement addressing modes (e.g. POST_DEC)
|
|
|
74 RTX_EXTRA
|
|
|
75 everything else
|
|
|
76
|
|
|
77 All of the expressions that appear only in machine descriptions,
|
|
|
78 not in RTL used by the compiler itself, are at the end of the file. */
|
|
|
79
|
|
|
80 /* Unknown, or no such operation; the enumeration constant should have
|
|
|
81 value zero. */
|
|
|
82 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
|
|
|
83
|
|
|
84 /* ---------------------------------------------------------------------
|
|
|
85 Expressions used in constructing lists.
|
|
|
86 --------------------------------------------------------------------- */
|
|
|
87
|
|
|
88 /* a linked list of expressions */
|
|
|
89 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
|
|
|
90
|
|
|
91 /* a linked list of instructions.
|
|
|
92 The insns are represented in print by their uids. */
|
|
|
93 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
|
|
|
94
|
|
|
95 /* SEQUENCE appears in the result of a `gen_...' function
|
|
|
96 for a DEFINE_EXPAND that wants to make several insns.
|
|
|
97 Its elements are the bodies of the insns that should be made.
|
|
|
98 `emit_insn' takes the SEQUENCE apart and makes separate insns. */
|
|
|
99 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
|
|
|
100
|
|
|
101 /* Refers to the address of its argument. This is only used in alias.c. */
|
|
|
102 DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
|
|
|
103
|
|
|
104 /* ----------------------------------------------------------------------
|
|
|
105 Expression types used for things in the instruction chain.
|
|
|
106
|
|
|
107 All formats must start with "iuu" to handle the chain.
|
|
|
108 Each insn expression holds an rtl instruction and its semantics
|
|
|
109 during back-end processing.
|
|
|
110 See macros's in "rtl.h" for the meaning of each rtx->u.fld[].
|
|
|
111
|
|
|
112 ---------------------------------------------------------------------- */
|
|
|
113
|
|
|
114 /* An instruction that cannot jump. */
|
|
|
115 DEF_RTL_EXPR(INSN, "insn", "iuuBieie", RTX_INSN)
|
|
|
116
|
|
|
117 /* An instruction that can possibly jump.
|
|
|
118 Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
|
|
|
119 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieie0", RTX_INSN)
|
|
|
120
|
|
|
121 /* An instruction that can possibly call a subroutine
|
|
|
122 but which will not change which instruction comes next
|
|
|
123 in the current function.
|
|
|
124 Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE.
|
|
|
125 All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
|
|
|
126 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieiee", RTX_INSN)
|
|
|
127
|
|
|
128 /* A marker that indicates that control will not flow through. */
|
|
|
129 DEF_RTL_EXPR(BARRIER, "barrier", "iuu00000", RTX_EXTRA)
|
|
|
130
|
|
|
131 /* Holds a label that is followed by instructions.
|
|
|
132 Operand:
|
|
|
133 4: is used in jump.c for the use-count of the label.
|
|
|
134 5: is used in the sh backend.
|
|
|
135 6: is a number that is unique in the entire compilation.
|
|
|
136 7: is the user-given name of the label, if any. */
|
|
|
137 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
|
|
|
138
|
|
|
139 /* Say where in the code a source line starts, for symbol table's sake.
|
|
|
140 Operand:
|
|
|
141 4: note-specific data
|
|
|
142 5: enum insn_note
|
|
|
143 6: unique number if insn_note == note_insn_deleted_label. */
|
|
|
144 DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
|
|
|
145
|
|
|
146 /* ----------------------------------------------------------------------
|
|
|
147 Top level constituents of INSN, JUMP_INSN and CALL_INSN.
|
|
|
148 ---------------------------------------------------------------------- */
|
|
|
149
|
|
|
150 /* Conditionally execute code.
|
|
|
151 Operand 0 is the condition that if true, the code is executed.
|
|
|
152 Operand 1 is the code to be executed (typically a SET).
|
|
|
153
|
|
|
154 Semantics are that there are no side effects if the condition
|
|
|
155 is false. This pattern is created automatically by the if_convert
|
|
|
156 pass run after reload or by target-specific splitters. */
|
|
|
157 DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA)
|
|
|
158
|
|
|
159 /* Several operations to be done in parallel (perhaps under COND_EXEC). */
|
|
|
160 DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA)
|
|
|
161
|
|
|
162 /* A string that is passed through to the assembler as input.
|
|
|
163 One can obviously pass comments through by using the
|
|
|
164 assembler comment syntax.
|
|
|
165 These occur in an insn all by themselves as the PATTERN.
|
|
|
166 They also appear inside an ASM_OPERANDS
|
|
|
167 as a convenient way to hold a string. */
|
|
|
168 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA)
|
|
|
169
|
|
|
170 /* An assembler instruction with operands.
|
|
|
171 1st operand is the instruction template.
|
|
|
172 2nd operand is the constraint for the output.
|
|
|
173 3rd operand is the number of the output this expression refers to.
|
|
|
174 When an insn stores more than one value, a separate ASM_OPERANDS
|
|
|
175 is made for each output; this integer distinguishes them.
|
|
|
176 4th is a vector of values of input operands.
|
|
|
177 5th is a vector of modes and constraints for the input operands.
|
|
|
178 Each element is an ASM_INPUT containing a constraint string
|
|
|
179 and whose mode indicates the mode of the input operand.
|
|
|
180 6th is the source line number. */
|
|
|
181 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEi", RTX_EXTRA)
|
|
|
182
|
|
|
183 /* A machine-specific operation.
|
|
|
184 1st operand is a vector of operands being used by the operation so that
|
|
|
185 any needed reloads can be done.
|
|
|
186 2nd operand is a unique value saying which of a number of machine-specific
|
|
|
187 operations is to be performed.
|
|
|
188 (Note that the vector must be the first operand because of the way that
|
|
|
189 genrecog.c record positions within an insn.)
|
|
|
190
|
|
|
191 UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL,
|
|
|
192 or inside an expression.
|
|
|
193 UNSPEC by itself or as a component of a PARALLEL
|
|
|
194 is currently considered not deletable.
|
|
|
195
|
|
|
196 FIXME: Replace all uses of UNSPEC that appears by itself or as a component
|
|
|
197 of a PARALLEL with USE.
|
|
|
198 */
|
|
|
199 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
|
|
|
200
|
|
|
201 /* Similar, but a volatile operation and one which may trap. */
|
|
|
202 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
|
|
|
203
|
|
|
204 /* Vector of addresses, stored as full words. */
|
|
|
205 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
|
|
|
206 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
|
|
|
207
|
|
|
208 /* Vector of address differences X0 - BASE, X1 - BASE, ...
|
|
|
209 First operand is BASE; the vector contains the X's.
|
|
|
210 The machine mode of this rtx says how much space to leave
|
|
|
211 for each difference and is adjusted by branch shortening if
|
|
|
212 CASE_VECTOR_SHORTEN_MODE is defined.
|
|
|
213 The third and fourth operands store the target labels with the
|
|
|
214 minimum and maximum addresses respectively.
|
|
|
215 The fifth operand stores flags for use by branch shortening.
|
|
|
216 Set at the start of shorten_branches:
|
|
|
217 min_align: the minimum alignment for any of the target labels.
|
|
|
218 base_after_vec: true iff BASE is after the ADDR_DIFF_VEC.
|
|
|
219 min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC.
|
|
|
220 max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC.
|
|
|
221 min_after_base: true iff minimum address target label is after BASE.
|
|
|
222 max_after_base: true iff maximum address target label is after BASE.
|
|
|
223 Set by the actual branch shortening process:
|
|
|
224 offset_unsigned: true iff offsets have to be treated as unsigned.
|
|
|
225 scale: scaling that is necessary to make offsets fit into the mode.
|
|
|
226
|
|
|
227 The third, fourth and fifth operands are only valid when
|
|
|
228 CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
|
|
|
229 compilations. */
|
|
|
230
|
|
|
231 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
|
|
|
232
|
|
|
233 /* Memory prefetch, with attributes supported on some targets.
|
|
|
234 Operand 1 is the address of the memory to fetch.
|
|
|
235 Operand 2 is 1 for a write access, 0 otherwise.
|
|
|
236 Operand 3 is the level of temporal locality; 0 means there is no
|
|
|
237 temporal locality and 1, 2, and 3 are for increasing levels of temporal
|
|
|
238 locality.
|
|
|
239
|
|
|
240 The attributes specified by operands 2 and 3 are ignored for targets
|
|
|
241 whose prefetch instructions do not support them. */
|
|
|
242 DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA)
|
|
|
243
|
|
|
244 /* ----------------------------------------------------------------------
|
|
|
245 At the top level of an instruction (perhaps under PARALLEL).
|
|
|
246 ---------------------------------------------------------------------- */
|
|
|
247
|
|
|
248 /* Assignment.
|
|
|
249 Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
|
|
|
250 Operand 2 is the value stored there.
|
|
|
251 ALL assignment must use SET.
|
|
|
252 Instructions that do multiple assignments must use multiple SET,
|
|
|
253 under PARALLEL. */
|
|
|
254 DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA)
|
|
|
255
|
|
|
256 /* Indicate something is used in a way that we don't want to explain.
|
|
|
257 For example, subroutine calls will use the register
|
|
|
258 in which the static chain is passed.
|
|
|
259
|
|
|
260 USE can not appear as an operand of other rtx except for PARALLEL.
|
|
|
261 USE is not deletable, as it indicates that the operand
|
|
|
262 is used in some unknown way. */
|
|
|
263 DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
|
|
|
264
|
|
|
265 /* Indicate something is clobbered in a way that we don't want to explain.
|
|
|
266 For example, subroutine calls will clobber some physical registers
|
|
|
267 (the ones that are by convention not saved).
|
|
|
268
|
|
|
269 CLOBBER can not appear as an operand of other rtx except for PARALLEL.
|
|
|
270 CLOBBER of a hard register appearing by itself (not within PARALLEL)
|
|
|
271 is considered undeletable before reload. */
|
|
|
272 DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
|
|
|
273
|
|
|
274 /* Call a subroutine.
|
|
|
275 Operand 1 is the address to call.
|
|
|
276 Operand 2 is the number of arguments. */
|
|
|
277
|
|
|
278 DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA)
|
|
|
279
|
|
|
280 /* Return from a subroutine. */
|
|
|
281
|
|
|
282 DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
|
|
|
283
|
|
|
284 /* Conditional trap.
|
|
|
285 Operand 1 is the condition.
|
|
|
286 Operand 2 is the trap code.
|
|
|
287 For an unconditional trap, make the condition (const_int 1). */
|
|
|
288 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
|
|
|
289
|
|
|
290 /* Placeholder for _Unwind_Resume before we know if a function call
|
|
|
291 or a branch is needed. Operand 1 is the exception region from
|
|
|
292 which control is flowing. */
|
|
|
293 DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
|
|
|
294
|
|
|
295 /* ----------------------------------------------------------------------
|
|
|
296 Primitive values for use in expressions.
|
|
|
297 ---------------------------------------------------------------------- */
|
|
|
298
|
|
|
299 /* numeric integer constant */
|
|
|
300 DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
|
|
|
301
|
|
|
302 /* fixed-point constant */
|
|
|
303 DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
|
|
|
304
|
|
|
305 /* numeric floating point constant.
|
|
|
306 Operands hold the value. They are all 'w' and there may be from 2 to 6;
|
|
|
307 see real.h. */
|
|
|
308 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
|
|
|
309
|
|
|
310 /* Describes a vector constant. */
|
|
|
311 DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_CONST_OBJ)
|
|
|
312
|
|
|
313 /* String constant. Used for attributes in machine descriptions and
|
|
|
314 for special cases in DWARF2 debug output. NOT used for source-
|
|
|
315 language string constants. */
|
|
|
316 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ)
|
|
|
317
|
|
|
318 /* This is used to encapsulate an expression whose value is constant
|
|
|
319 (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
|
|
|
320 recognized as a constant operand rather than by arithmetic instructions. */
|
|
|
321
|
|
|
322 DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ)
|
|
|
323
|
|
|
324 /* program counter. Ordinary jumps are represented
|
|
|
325 by a SET whose first operand is (PC). */
|
|
|
326 DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
|
|
|
327
|
|
|
328 /* Used in the cselib routines to describe a value. Objects of this
|
|
|
329 kind are only allocated in cselib.c, in an alloc pool instead of
|
|
|
330 in GC memory. The only operand of a VALUE is a cselib_val_struct. */
|
|
|
331 DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
|
|
|
332
|
|
|
333 /* A register. The "operand" is the register number, accessed with
|
|
|
334 the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
|
|
|
335 than a hardware register is being referred to. The second operand
|
|
|
336 holds the original register number - this will be different for a
|
|
|
337 pseudo register that got turned into a hard register. The third
|
|
|
338 operand points to a reg_attrs structure.
|
|
|
339 This rtx needs to have as many (or more) fields as a MEM, since we
|
|
|
340 can change REG rtx's into MEMs during reload. */
|
|
|
341 DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
|
|
|
342
|
|
|
343 /* A scratch register. This represents a register used only within a
|
|
|
344 single insn. It will be turned into a REG during register allocation
|
|
|
345 or reload unless the constraint indicates that the register won't be
|
|
|
346 needed, in which case it can remain a SCRATCH. This code is
|
|
|
347 marked as having one operand so it can be turned into a REG. */
|
|
|
348 DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
|
|
|
349
|
|
|
350 /* A reference to a part of another value. The first operand is the
|
|
|
351 complete value and the second is the byte offset of the selected part. */
|
|
|
352 DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
|
|
|
353
|
|
|
354 /* This one-argument rtx is used for move instructions
|
|
|
355 that are guaranteed to alter only the low part of a destination.
|
|
|
356 Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
|
|
|
357 has an unspecified effect on the high part of REG,
|
|
|
358 but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
|
|
|
359 is guaranteed to alter only the bits of REG that are in HImode.
|
|
|
360
|
|
|
361 The actual instruction used is probably the same in both cases,
|
|
|
362 but the register constraints may be tighter when STRICT_LOW_PART
|
|
|
363 is in use. */
|
|
|
364
|
|
|
365 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA)
|
|
|
366
|
|
|
367 /* (CONCAT a b) represents the virtual concatenation of a and b
|
|
|
368 to make a value that has as many bits as a and b put together.
|
|
|
369 This is used for complex values. Normally it appears only
|
|
|
370 in DECL_RTLs and during RTL generation, but not in the insn chain. */
|
|
|
371 DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ)
|
|
|
372
|
|
|
373 /* (CONCATN [a1 a2 ... an]) represents the virtual concatenation of
|
|
|
374 all An to make a value. This is an extension of CONCAT to larger
|
|
|
375 number of components. Like CONCAT, it should not appear in the
|
|
|
376 insn chain. Every element of the CONCATN is the same size. */
|
|
|
377 DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ)
|
|
|
378
|
|
|
379 /* A memory location; operand is the address. The second operand is the
|
|
|
380 alias set to which this MEM belongs. We use `0' instead of `w' for this
|
|
|
381 field so that the field need not be specified in machine descriptions. */
|
|
|
382 DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
|
|
|
383
|
|
|
384 /* Reference to an assembler label in the code for this function.
|
|
|
385 The operand is a CODE_LABEL found in the insn chain. */
|
|
|
386 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
|
|
|
387
|
|
|
388 /* Reference to a named label:
|
|
|
389 Operand 0: label name
|
|
|
390 Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
|
|
|
391 Operand 2: tree from which this symbol is derived, or null.
|
|
|
392 This is either a DECL node, or some kind of constant. */
|
|
|
393 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
|
|
|
394
|
|
|
395 /* The condition code register is represented, in our imagination,
|
|
|
396 as a register holding a value that can be compared to zero.
|
|
|
397 In fact, the machine has already compared them and recorded the
|
|
|
398 results; but instructions that look at the condition code
|
|
|
399 pretend to be looking at the entire value and comparing it. */
|
|
|
400 DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
|
|
|
401
|
|
|
402 /* ----------------------------------------------------------------------
|
|
|
403 Expressions for operators in an rtl pattern
|
|
|
404 ---------------------------------------------------------------------- */
|
|
|
405
|
|
|
406 /* if_then_else. This is used in representing ordinary
|
|
|
407 conditional jump instructions.
|
|
|
408 Operand:
|
|
|
409 0: condition
|
|
|
410 1: then expr
|
|
|
411 2: else expr */
|
|
|
412 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY)
|
|
|
413
|
|
|
414 /* Comparison, produces a condition code result. */
|
|
|
415 DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH)
|
|
|
416
|
|
|
417 /* plus */
|
|
|
418 DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH)
|
|
|
419
|
|
|
420 /* Operand 0 minus operand 1. */
|
|
|
421 DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH)
|
|
|
422
|
|
|
423 /* Minus operand 0. */
|
|
|
424 DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY)
|
|
|
425
|
|
|
426 DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH)
|
|
|
427
|
|
|
428 /* Multiplication with signed saturation */
|
|
|
429 DEF_RTL_EXPR(SS_MULT, "ss_mult", "ee", RTX_COMM_ARITH)
|
|
|
430 /* Multiplication with unsigned saturation */
|
|
|
431 DEF_RTL_EXPR(US_MULT, "us_mult", "ee", RTX_COMM_ARITH)
|
|
|
432
|
|
|
433 /* Operand 0 divided by operand 1. */
|
|
|
434 DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH)
|
|
|
435 /* Division with signed saturation */
|
|
|
436 DEF_RTL_EXPR(SS_DIV, "ss_div", "ee", RTX_BIN_ARITH)
|
|
|
437 /* Division with unsigned saturation */
|
|
|
438 DEF_RTL_EXPR(US_DIV, "us_div", "ee", RTX_BIN_ARITH)
|
|
|
439
|
|
|
440 /* Remainder of operand 0 divided by operand 1. */
|
|
|
441 DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH)
|
|
|
442
|
|
|
443 /* Unsigned divide and remainder. */
|
|
|
444 DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH)
|
|
|
445 DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH)
|
|
|
446
|
|
|
447 /* Bitwise operations. */
|
|
|
448 DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH)
|
|
|
449 DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH)
|
|
|
450 DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH)
|
|
|
451 DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY)
|
|
|
452
|
|
|
453 /* Operand:
|
|
|
454 0: value to be shifted.
|
|
|
455 1: number of bits. */
|
|
|
456 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */
|
|
|
457 DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */
|
|
|
458 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */
|
|
|
459 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */
|
|
|
460 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */
|
|
|
461
|
|
|
462 /* Minimum and maximum values of two operands. We need both signed and
|
|
|
463 unsigned forms. (We cannot use MIN for SMIN because it conflicts
|
|
|
464 with a macro of the same name.) The signed variants should be used
|
|
|
465 with floating point. Further, if both operands are zeros, or if either
|
|
|
466 operand is NaN, then it is unspecified which of the two operands is
|
|
|
467 returned as the result. */
|
|
|
468
|
|
|
469 DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH)
|
|
|
470 DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH)
|
|
|
471 DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH)
|
|
|
472 DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH)
|
|
|
473
|
|
|
474 /* These unary operations are used to represent incrementation
|
|
|
475 and decrementation as they occur in memory addresses.
|
|
|
476 The amount of increment or decrement are not represented
|
|
|
477 because they can be understood from the machine-mode of the
|
|
|
478 containing MEM. These operations exist in only two cases:
|
|
|
479 1. pushes onto the stack.
|
|
|
480 2. created automatically by the life_analysis pass in flow.c. */
|
|
|
481 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
|
|
|
482 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
|
|
|
483 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
|
|
|
484 DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC)
|
|
|
485
|
|
|
486 /* These binary operations are used to represent generic address
|
|
|
487 side-effects in memory addresses, except for simple incrementation
|
|
|
488 or decrementation which use the above operations. They are
|
|
|
489 created automatically by the life_analysis pass in flow.c.
|
|
|
490 The first operand is a REG which is used as the address.
|
|
|
491 The second operand is an expression that is assigned to the
|
|
|
492 register, either before (PRE_MODIFY) or after (POST_MODIFY)
|
|
|
493 evaluating the address.
|
|
|
494 Currently, the compiler can only handle second operands of the
|
|
|
495 form (plus (reg) (reg)) and (plus (reg) (const_int)), where
|
|
|
496 the first operand of the PLUS has to be the same register as
|
|
|
497 the first operand of the *_MODIFY. */
|
|
|
498 DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC)
|
|
|
499 DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC)
|
|
|
500
|
|
|
501 /* Comparison operations. The ordered comparisons exist in two
|
|
|
502 flavors, signed and unsigned. */
|
|
|
503 DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE)
|
|
|
504 DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE)
|
|
|
505 DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE)
|
|
|
506 DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE)
|
|
|
507 DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE)
|
|
|
508 DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE)
|
|
|
509 DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE)
|
|
|
510 DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE)
|
|
|
511 DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE)
|
|
|
512 DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE)
|
|
|
513
|
|
|
514 /* Additional floating point unordered comparison flavors. */
|
|
|
515 DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE)
|
|
|
516 DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE)
|
|
|
517
|
|
|
518 /* These are equivalent to unordered or ... */
|
|
|
519 DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE)
|
|
|
520 DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE)
|
|
|
521 DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE)
|
|
|
522 DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE)
|
|
|
523 DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE)
|
|
|
524
|
|
|
525 /* This is an ordered NE, ie !UNEQ, ie false for NaN. */
|
|
|
526 DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE)
|
|
|
527
|
|
|
528 /* Represents the result of sign-extending the sole operand.
|
|
|
529 The machine modes of the operand and of the SIGN_EXTEND expression
|
|
|
530 determine how much sign-extension is going on. */
|
|
|
531 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY)
|
|
|
532
|
|
|
533 /* Similar for zero-extension (such as unsigned short to int). */
|
|
|
534 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY)
|
|
|
535
|
|
|
536 /* Similar but here the operand has a wider mode. */
|
|
|
537 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY)
|
|
|
538
|
|
|
539 /* Similar for extending floating-point values (such as SFmode to DFmode). */
|
|
|
540 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY)
|
|
|
541 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY)
|
|
|
542
|
|
|
543 /* Conversion of fixed point operand to floating point value. */
|
|
|
544 DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY)
|
|
|
545
|
|
|
546 /* With fixed-point machine mode:
|
|
|
547 Conversion of floating point operand to fixed point value.
|
|
|
548 Value is defined only when the operand's value is an integer.
|
|
|
549 With floating-point machine mode (and operand with same mode):
|
|
|
550 Operand is rounded toward zero to produce an integer value
|
|
|
551 represented in floating point. */
|
|
|
552 DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY)
|
|
|
553
|
|
|
554 /* Conversion of unsigned fixed point operand to floating point value. */
|
|
|
555 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY)
|
|
|
556
|
|
|
557 /* With fixed-point machine mode:
|
|
|
558 Conversion of floating point operand to *unsigned* fixed point value.
|
|
|
559 Value is defined only when the operand's value is an integer. */
|
|
|
560 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY)
|
|
|
561
|
|
|
562 /* Conversions involving fractional fixed-point types without saturation,
|
|
|
563 including:
|
|
|
564 fractional to fractional (of different precision),
|
|
|
565 signed integer to fractional,
|
|
|
566 fractional to signed integer,
|
|
|
567 floating point to fractional,
|
|
|
568 fractional to floating point.
|
|
|
569 NOTE: fractional can be either signed or unsigned for conversions. */
|
|
|
570 DEF_RTL_EXPR(FRACT_CONVERT, "fract_convert", "e", RTX_UNARY)
|
|
|
571
|
|
|
572 /* Conversions involving fractional fixed-point types and unsigned integer
|
|
|
573 without saturation, including:
|
|
|
574 unsigned integer to fractional,
|
|
|
575 fractional to unsigned integer.
|
|
|
576 NOTE: fractional can be either signed or unsigned for conversions. */
|
|
|
577 DEF_RTL_EXPR(UNSIGNED_FRACT_CONVERT, "unsigned_fract_convert", "e", RTX_UNARY)
|
|
|
578
|
|
|
579 /* Conversions involving fractional fixed-point types with saturation,
|
|
|
580 including:
|
|
|
581 fractional to fractional (of different precision),
|
|
|
582 signed integer to fractional,
|
|
|
583 floating point to fractional.
|
|
|
584 NOTE: fractional can be either signed or unsigned for conversions. */
|
|
|
585 DEF_RTL_EXPR(SAT_FRACT, "sat_fract", "e", RTX_UNARY)
|
|
|
586
|
|
|
587 /* Conversions involving fractional fixed-point types and unsigned integer
|
|
|
588 with saturation, including:
|
|
|
589 unsigned integer to fractional.
|
|
|
590 NOTE: fractional can be either signed or unsigned for conversions. */
|
|
|
591 DEF_RTL_EXPR(UNSIGNED_SAT_FRACT, "unsigned_sat_fract", "e", RTX_UNARY)
|
|
|
592
|
|
|
593 /* Absolute value */
|
|
|
594 DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY)
|
|
|
595
|
|
|
596 /* Square root */
|
|
|
597 DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY)
|
|
|
598
|
|
|
599 /* Swap bytes. */
|
|
|
600 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY)
|
|
|
601
|
|
|
602 /* Find first bit that is set.
|
|
|
603 Value is 1 + number of trailing zeros in the arg.,
|
|
|
604 or 0 if arg is 0. */
|
|
|
605 DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
|
|
|
606
|
|
|
607 /* Count leading zeros. */
|
|
|
608 DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
|
|
|
609
|
|
|
610 /* Count trailing zeros. */
|
|
|
611 DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY)
|
|
|
612
|
|
|
613 /* Population count (number of 1 bits). */
|
|
|
614 DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY)
|
|
|
615
|
|
|
616 /* Population parity (number of 1 bits modulo 2). */
|
|
|
617 DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY)
|
|
|
618
|
|
|
619 /* Reference to a signed bit-field of specified size and position.
|
|
|
620 Operand 0 is the memory unit (usually SImode or QImode) which
|
|
|
621 contains the field's first bit. Operand 1 is the width, in bits.
|
|
|
622 Operand 2 is the number of bits in the memory unit before the
|
|
|
623 first bit of this field.
|
|
|
624 If BITS_BIG_ENDIAN is defined, the first bit is the msb and
|
|
|
625 operand 2 counts from the msb of the memory unit.
|
|
|
626 Otherwise, the first bit is the lsb and operand 2 counts from
|
|
|
627 the lsb of the memory unit.
|
|
|
628 This kind of expression can not appear as an lvalue in RTL. */
|
|
|
629 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS)
|
|
|
630
|
|
|
631 /* Similar for unsigned bit-field.
|
|
|
632 But note! This kind of expression _can_ appear as an lvalue. */
|
|
|
633 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS)
|
|
|
634
|
|
|
635 /* For RISC machines. These save memory when splitting insns. */
|
|
|
636
|
|
|
637 /* HIGH are the high-order bits of a constant expression. */
|
|
|
638 DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ)
|
|
|
639
|
|
|
640 /* LO_SUM is the sum of a register and the low-order bits
|
|
|
641 of a constant expression. */
|
|
|
642 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ)
|
|
|
643
|
|
|
644 /* Describes a merge operation between two vector values.
|
|
|
645 Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask
|
|
|
646 that specifies where the parts of the result are taken from. Set bits
|
|
|
647 indicate operand 0, clear bits indicate operand 1. The parts are defined
|
|
|
648 by the mode of the vectors. */
|
|
|
649 DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY)
|
|
|
650
|
|
|
651 /* Describes an operation that selects parts of a vector.
|
|
|
652 Operands 0 is the source vector, operand 1 is a PARALLEL that contains
|
|
|
653 a CONST_INT for each of the subparts of the result vector, giving the
|
|
|
654 number of the source subpart that should be stored into it. */
|
|
|
655 DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH)
|
|
|
656
|
|
|
657 /* Describes a vector concat operation. Operands 0 and 1 are the source
|
|
|
658 vectors, the result is a vector that is as long as operands 0 and 1
|
|
|
659 combined and is the concatenation of the two source vectors. */
|
|
|
660 DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH)
|
|
|
661
|
|
|
662 /* Describes an operation that converts a small vector into a larger one by
|
|
|
663 duplicating the input values. The output vector mode must have the same
|
|
|
664 submodes as the input vector mode, and the number of output parts must be
|
|
|
665 an integer multiple of the number of input parts. */
|
|
|
666 DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
|
|
|
667
|
|
|
668 /* Addition with signed saturation */
|
|
|
669 DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
|
|
|
670
|
|
|
671 /* Addition with unsigned saturation */
|
|
|
672 DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
|
|
|
673
|
|
|
674 /* Operand 0 minus operand 1, with signed saturation. */
|
|
|
675 DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
|
|
|
676
|
|
|
677 /* Negation with signed saturation. */
|
|
|
678 DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY)
|
|
|
679 /* Negation with unsigned saturation. */
|
|
|
680 DEF_RTL_EXPR(US_NEG, "us_neg", "e", RTX_UNARY)
|
|
|
681
|
|
|
682 /* Absolute value with signed saturation. */
|
|
|
683 DEF_RTL_EXPR(SS_ABS, "ss_abs", "e", RTX_UNARY)
|
|
|
684
|
|
|
685 /* Shift left with signed saturation. */
|
|
|
686 DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH)
|
|
|
687
|
|
|
688 /* Shift left with unsigned saturation. */
|
|
|
689 DEF_RTL_EXPR(US_ASHIFT, "us_ashift", "ee", RTX_BIN_ARITH)
|
|
|
690
|
|
|
691 /* Operand 0 minus operand 1, with unsigned saturation. */
|
|
|
692 DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
|
|
|
693
|
|
|
694 /* Signed saturating truncate. */
|
|
|
695 DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY)
|
|
|
696
|
|
|
697 /* Unsigned saturating truncate. */
|
|
|
698 DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY)
|
|
|
699
|
|
|
700 /* Information about the variable and its location. */
|
|
|
701 /* Changed 'te' to 'tei'; the 'i' field is for recording
|
|
|
702 initialization status of variables. */
|
|
|
703 DEF_RTL_EXPR(VAR_LOCATION, "var_location", "tei", RTX_EXTRA)
|
|
|
704
|
|
|
705 /* All expressions from this point forward appear only in machine
|
|
|
706 descriptions. */
|
|
|
707 #ifdef GENERATOR_FILE
|
|
|
708
|
|
|
709 /* Include a secondary machine-description file at this point. */
|
|
|
710 DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA)
|
|
|
711
|
|
|
712 /* Pattern-matching operators: */
|
|
|
713
|
|
|
714 /* Use the function named by the second arg (the string)
|
|
|
715 as a predicate; if matched, store the structure that was matched
|
|
|
716 in the operand table at index specified by the first arg (the integer).
|
|
|
717 If the second arg is the null string, the structure is just stored.
|
|
|
718
|
|
|
719 A third string argument indicates to the register allocator restrictions
|
|
|
720 on where the operand can be allocated.
|
|
|
721
|
|
|
722 If the target needs no restriction on any instruction this field should
|
|
|
723 be the null string.
|
|
|
724
|
|
|
725 The string is prepended by:
|
|
|
726 '=' to indicate the operand is only written to.
|
|
|
727 '+' to indicate the operand is both read and written to.
|
|
|
728
|
|
|
729 Each character in the string represents an allocable class for an operand.
|
|
|
730 'g' indicates the operand can be any valid class.
|
|
|
731 'i' indicates the operand can be immediate (in the instruction) data.
|
|
|
732 'r' indicates the operand can be in a register.
|
|
|
733 'm' indicates the operand can be in memory.
|
|
|
734 'o' a subset of the 'm' class. Those memory addressing modes that
|
|
|
735 can be offset at compile time (have a constant added to them).
|
|
|
736
|
|
|
737 Other characters indicate target dependent operand classes and
|
|
|
738 are described in each target's machine description.
|
|
|
739
|
|
|
740 For instructions with more than one operand, sets of classes can be
|
|
|
741 separated by a comma to indicate the appropriate multi-operand constraints.
|
|
|
742 There must be a 1 to 1 correspondence between these sets of classes in
|
|
|
743 all operands for an instruction.
|
|
|
744 */
|
|
|
745 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH)
|
|
|
746
|
|
|
747 /* Match a SCRATCH or a register. When used to generate rtl, a
|
|
|
748 SCRATCH is generated. As for MATCH_OPERAND, the mode specifies
|
|
|
749 the desired mode and the first argument is the operand number.
|
|
|
750 The second argument is the constraint. */
|
|
|
751 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH)
|
|
|
752
|
|
|
753 /* Apply a predicate, AND match recursively the operands of the rtx.
|
|
|
754 Operand 0 is the operand-number, as in match_operand.
|
|
|
755 Operand 1 is a predicate to apply (as a string, a function name).
|
|
|
756 Operand 2 is a vector of expressions, each of which must match
|
|
|
757 one subexpression of the rtx this construct is matching. */
|
|
|
758 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH)
|
|
|
759
|
|
|
760 /* Match a PARALLEL of arbitrary length. The predicate is applied
|
|
|
761 to the PARALLEL and the initial expressions in the PARALLEL are matched.
|
|
|
762 Operand 0 is the operand-number, as in match_operand.
|
|
|
763 Operand 1 is a predicate to apply to the PARALLEL.
|
|
|
764 Operand 2 is a vector of expressions, each of which must match the
|
|
|
765 corresponding element in the PARALLEL. */
|
|
|
766 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
|
|
|
767
|
|
|
768 /* Match only something equal to what is stored in the operand table
|
|
|
769 at the index specified by the argument. Use with MATCH_OPERAND. */
|
|
|
770 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH)
|
|
|
771
|
|
|
772 /* Match only something equal to what is stored in the operand table
|
|
|
773 at the index specified by the argument. Use with MATCH_OPERATOR. */
|
|
|
774 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH)
|
|
|
775
|
|
|
776 /* Match only something equal to what is stored in the operand table
|
|
|
777 at the index specified by the argument. Use with MATCH_PARALLEL. */
|
|
|
778 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH)
|
|
|
779
|
|
|
780 /* Appears only in define_predicate/define_special_predicate
|
|
|
781 expressions. Evaluates true only if the operand has an RTX code
|
|
|
782 from the set given by the argument (a comma-separated list). If the
|
|
|
783 second argument is present and nonempty, it is a sequence of digits
|
|
|
784 and/or letters which indicates the subexpression to test, using the
|
|
|
785 same syntax as genextract/genrecog's location strings: 0-9 for
|
|
|
786 XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to
|
|
|
787 the result of the one before it. */
|
|
|
788 DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
|
|
|
789
|
|
|
790 /* Appears only in define_predicate/define_special_predicate
|
|
|
791 expressions. The argument is a C expression to be injected at this
|
|
|
792 point in the predicate formula. */
|
|
|
793 DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH)
|
|
|
794
|
|
|
795 /* Insn (and related) definitions. */
|
|
|
796
|
|
|
797 /* Definition of the pattern for one kind of instruction.
|
|
|
798 Operand:
|
|
|
799 0: names this instruction.
|
|
|
800 If the name is the null string, the instruction is in the
|
|
|
801 machine description just to be recognized, and will never be emitted by
|
|
|
802 the tree to rtl expander.
|
|
|
803 1: is the pattern.
|
|
|
804 2: is a string which is a C expression
|
|
|
805 giving an additional condition for recognizing this pattern.
|
|
|
806 A null string means no extra condition.
|
|
|
807 3: is the action to execute if this pattern is matched.
|
|
|
808 If this assembler code template starts with a * then it is a fragment of
|
|
|
809 C code to run to decide on a template to use. Otherwise, it is the
|
|
|
810 template to use.
|
|
|
811 4: optionally, a vector of attributes for this insn.
|
|
|
812 */
|
|
|
813 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA)
|
|
|
814
|
|
|
815 /* Definition of a peephole optimization.
|
|
|
816 1st operand: vector of insn patterns to match
|
|
|
817 2nd operand: C expression that must be true
|
|
|
818 3rd operand: template or C code to produce assembler output.
|
|
|
819 4: optionally, a vector of attributes for this insn.
|
|
|
820
|
|
|
821 This form is deprecated; use define_peephole2 instead. */
|
|
|
822 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA)
|
|
|
823
|
|
|
824 /* Definition of a split operation.
|
|
|
825 1st operand: insn pattern to match
|
|
|
826 2nd operand: C expression that must be true
|
|
|
827 3rd operand: vector of insn patterns to place into a SEQUENCE
|
|
|
828 4th operand: optionally, some C code to execute before generating the
|
|
|
829 insns. This might, for example, create some RTX's and store them in
|
|
|
830 elements of `recog_data.operand' for use by the vector of
|
|
|
831 insn-patterns.
|
|
|
832 (`operands' is an alias here for `recog_data.operand'). */
|
|
|
833 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA)
|
|
|
834
|
|
|
835 /* Definition of an insn and associated split.
|
|
|
836 This is the concatenation, with a few modifications, of a define_insn
|
|
|
837 and a define_split which share the same pattern.
|
|
|
838 Operand:
|
|
|
839 0: names this instruction.
|
|
|
840 If the name is the null string, the instruction is in the
|
|
|
841 machine description just to be recognized, and will never be emitted by
|
|
|
842 the tree to rtl expander.
|
|
|
843 1: is the pattern.
|
|
|
844 2: is a string which is a C expression
|
|
|
845 giving an additional condition for recognizing this pattern.
|
|
|
846 A null string means no extra condition.
|
|
|
847 3: is the action to execute if this pattern is matched.
|
|
|
848 If this assembler code template starts with a * then it is a fragment of
|
|
|
849 C code to run to decide on a template to use. Otherwise, it is the
|
|
|
850 template to use.
|
|
|
851 4: C expression that must be true for split. This may start with "&&"
|
|
|
852 in which case the split condition is the logical and of the insn
|
|
|
853 condition and what follows the "&&" of this operand.
|
|
|
854 5: vector of insn patterns to place into a SEQUENCE
|
|
|
855 6: optionally, some C code to execute before generating the
|
|
|
856 insns. This might, for example, create some RTX's and store them in
|
|
|
857 elements of `recog_data.operand' for use by the vector of
|
|
|
858 insn-patterns.
|
|
|
859 (`operands' is an alias here for `recog_data.operand').
|
|
|
860 7: optionally, a vector of attributes for this insn. */
|
|
|
861 DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
|
|
|
862
|
|
|
863 /* Definition of an RTL peephole operation.
|
|
|
864 Follows the same arguments as define_split. */
|
|
|
865 DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA)
|
|
|
866
|
|
|
867 /* Define how to generate multiple insns for a standard insn name.
|
|
|
868 1st operand: the insn name.
|
|
|
869 2nd operand: vector of insn-patterns.
|
|
|
870 Use match_operand to substitute an element of `recog_data.operand'.
|
|
|
871 3rd operand: C expression that must be true for this to be available.
|
|
|
872 This may not test any operands.
|
|
|
873 4th operand: Extra C code to execute before generating the insns.
|
|
|
874 This might, for example, create some RTX's and store them in
|
|
|
875 elements of `recog_data.operand' for use by the vector of
|
|
|
876 insn-patterns.
|
|
|
877 (`operands' is an alias here for `recog_data.operand'). */
|
|
|
878 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
|
|
|
879
|
|
|
880 /* Define a requirement for delay slots.
|
|
|
881 1st operand: Condition involving insn attributes that, if true,
|
|
|
882 indicates that the insn requires the number of delay slots
|
|
|
883 shown.
|
|
|
884 2nd operand: Vector whose length is the three times the number of delay
|
|
|
885 slots required.
|
|
|
886 Each entry gives three conditions, each involving attributes.
|
|
|
887 The first must be true for an insn to occupy that delay slot
|
|
|
888 location. The second is true for all insns that can be
|
|
|
889 annulled if the branch is true and the third is true for all
|
|
|
890 insns that can be annulled if the branch is false.
|
|
|
891
|
|
|
892 Multiple DEFINE_DELAYs may be present. They indicate differing
|
|
|
893 requirements for delay slots. */
|
|
|
894 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
|
|
|
895
|
|
|
896 /* Define attribute computation for `asm' instructions. */
|
|
|
897 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA)
|
|
|
898
|
|
|
899 /* Definition of a conditional execution meta operation. Automatically
|
|
|
900 generates new instances of DEFINE_INSN, selected by having attribute
|
|
|
901 "predicable" true. The new pattern will contain a COND_EXEC and the
|
|
|
902 predicate at top-level.
|
|
|
903
|
|
|
904 Operand:
|
|
|
905 0: The predicate pattern. The top-level form should match a
|
|
|
906 relational operator. Operands should have only one alternative.
|
|
|
907 1: A C expression giving an additional condition for recognizing
|
|
|
908 the generated pattern.
|
|
|
909 2: A template or C code to produce assembler output. */
|
|
|
910 DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
|
|
|
911
|
|
|
912 /* Definition of an operand predicate. The difference between
|
|
|
913 DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will
|
|
|
914 not warn about a match_operand with no mode if it has a predicate
|
|
|
915 defined with DEFINE_SPECIAL_PREDICATE.
|
|
|
916
|
|
|
917 Operand:
|
|
|
918 0: The name of the predicate.
|
|
|
919 1: A boolean expression which computes whether or not the predicate
|
|
|
920 matches. This expression can use IOR, AND, NOT, MATCH_OPERAND,
|
|
|
921 MATCH_CODE, and MATCH_TEST. It must be specific enough that genrecog
|
|
|
922 can calculate the set of RTX codes that can possibly match.
|
|
|
923 2: A C function body which must return true for the predicate to match.
|
|
|
924 Optional. Use this when the test is too complicated to fit into a
|
|
|
925 match_test expression. */
|
|
|
926 DEF_RTL_EXPR(DEFINE_PREDICATE, "define_predicate", "ses", RTX_EXTRA)
|
|
|
927 DEF_RTL_EXPR(DEFINE_SPECIAL_PREDICATE, "define_special_predicate", "ses", RTX_EXTRA)
|
|
|
928
|
|
|
929 /* Definition of a register operand constraint. This simply maps the
|
|
|
930 constraint string to a register class.
|
|
|
931
|
|
|
932 Operand:
|
|
|
933 0: The name of the constraint (often, but not always, a single letter).
|
|
|
934 1: A C expression which evaluates to the appropriate register class for
|
|
|
935 this constraint. If this is not just a constant, it should look only
|
|
|
936 at -m switches and the like.
|
|
|
937 2: A docstring for this constraint, in Texinfo syntax; not currently
|
|
|
938 used, in future will be incorporated into the manual's list of
|
|
|
939 machine-specific operand constraints. */
|
|
|
940 DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA)
|
|
|
941
|
|
|
942 /* Definition of a non-register operand constraint. These look at the
|
|
|
943 operand and decide whether it fits the constraint.
|
|
|
944
|
|
|
945 DEFINE_CONSTRAINT gets no special treatment if it fails to match.
|
|
|
946 It is appropriate for constant-only constraints, and most others.
|
|
|
947
|
|
|
948 DEFINE_MEMORY_CONSTRAINT tells reload that this constraint can be made
|
|
|
949 to match, if it doesn't already, by converting the operand to the form
|
|
|
950 (mem (reg X)) where X is a base register. It is suitable for constraints
|
|
|
951 that describe a subset of all memory references.
|
|
|
952
|
|
|
953 DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made
|
|
|
954 to match, if it doesn't already, by converting the operand to the form
|
|
|
955 (reg X) where X is a base register. It is suitable for constraints that
|
|
|
956 describe a subset of all address references.
|
|
|
957
|
|
|
958 When in doubt, use plain DEFINE_CONSTRAINT.
|
|
|
959
|
|
|
960 Operand:
|
|
|
961 0: The name of the constraint (often, but not always, a single letter).
|
|
|
962 1: A docstring for this constraint, in Texinfo syntax; not currently
|
|
|
963 used, in future will be incorporated into the manual's list of
|
|
|
964 machine-specific operand constraints.
|
|
|
965 2: A boolean expression which computes whether or not the constraint
|
|
|
966 matches. It should follow the same rules as a define_predicate
|
|
|
967 expression, including the bit about specifying the set of RTX codes
|
|
|
968 that could possibly match. MATCH_TEST subexpressions may make use of
|
|
|
969 these variables:
|
|
|
970 `op' - the RTL object defining the operand.
|
|
|
971 `mode' - the mode of `op'.
|
|
|
972 `ival' - INTVAL(op), if op is a CONST_INT.
|
|
|
973 `hval' - CONST_DOUBLE_HIGH(op), if op is an integer CONST_DOUBLE.
|
|
|
974 `lval' - CONST_DOUBLE_LOW(op), if op is an integer CONST_DOUBLE.
|
|
|
975 `rval' - CONST_DOUBLE_REAL_VALUE(op), if op is a floating-point
|
|
|
976 CONST_DOUBLE.
|
|
|
977 Do not use ival/hval/lval/rval if op is not the appropriate kind of
|
|
|
978 RTL object. */
|
|
|
979 DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
|
|
|
980 DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
|
|
|
981 DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
|
|
|
982
|
|
|
983
|
|
|
984 /* Constructions for CPU pipeline description described by NDFAs. */
|
|
|
985
|
|
|
986 /* (define_cpu_unit string [string]) describes cpu functional
|
|
|
987 units (separated by comma).
|
|
|
988
|
|
|
989 1st operand: Names of cpu functional units.
|
|
|
990 2nd operand: Name of automaton (see comments for DEFINE_AUTOMATON).
|
|
|
991
|
|
|
992 All define_reservations, define_cpu_units, and
|
|
|
993 define_query_cpu_units should have unique names which may not be
|
|
|
994 "nothing". */
|
|
|
995 DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA)
|
|
|
996
|
|
|
997 /* (define_query_cpu_unit string [string]) describes cpu functional
|
|
|
998 units analogously to define_cpu_unit. The reservation of such
|
|
|
999 units can be queried for automaton state. */
|
|
|
1000 DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA)
|
|
|
1001
|
|
|
1002 /* (exclusion_set string string) means that each CPU functional unit
|
|
|
1003 in the first string can not be reserved simultaneously with any
|
|
|
1004 unit whose name is in the second string and vise versa. CPU units
|
|
|
1005 in the string are separated by commas. For example, it is useful
|
|
|
1006 for description CPU with fully pipelined floating point functional
|
|
|
1007 unit which can execute simultaneously only single floating point
|
|
|
1008 insns or only double floating point insns. All CPU functional
|
|
|
1009 units in a set should belong to the same automaton. */
|
|
|
1010 DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA)
|
|
|
1011
|
|
|
1012 /* (presence_set string string) means that each CPU functional unit in
|
|
|
1013 the first string can not be reserved unless at least one of pattern
|
|
|
1014 of units whose names are in the second string is reserved. This is
|
|
|
1015 an asymmetric relation. CPU units or unit patterns in the strings
|
|
|
1016 are separated by commas. Pattern is one unit name or unit names
|
|
|
1017 separated by white-spaces.
|
|
|
1018
|
|
|
1019 For example, it is useful for description that slot1 is reserved
|
|
|
1020 after slot0 reservation for a VLIW processor. We could describe it
|
|
|
1021 by the following construction
|
|
|
1022
|
|
|
1023 (presence_set "slot1" "slot0")
|
|
|
1024
|
|
|
1025 Or slot1 is reserved only after slot0 and unit b0 reservation. In
|
|
|
1026 this case we could write
|
|
|
1027
|
|
|
1028 (presence_set "slot1" "slot0 b0")
|
|
|
1029
|
|
|
1030 All CPU functional units in a set should belong to the same
|
|
|
1031 automaton. */
|
|
|
1032 DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA)
|
|
|
1033
|
|
|
1034 /* (final_presence_set string string) is analogous to `presence_set'.
|
|
|
1035 The difference between them is when checking is done. When an
|
|
|
1036 instruction is issued in given automaton state reflecting all
|
|
|
1037 current and planned unit reservations, the automaton state is
|
|
|
1038 changed. The first state is a source state, the second one is a
|
|
|
1039 result state. Checking for `presence_set' is done on the source
|
|
|
1040 state reservation, checking for `final_presence_set' is done on the
|
|
|
1041 result reservation. This construction is useful to describe a
|
|
|
1042 reservation which is actually two subsequent reservations. For
|
|
|
1043 example, if we use
|
|
|
1044
|
|
|
1045 (presence_set "slot1" "slot0")
|
|
|
1046
|
|
|
1047 the following insn will be never issued (because slot1 requires
|
|
|
1048 slot0 which is absent in the source state).
|
|
|
1049
|
|
|
1050 (define_reservation "insn_and_nop" "slot0 + slot1")
|
|
|
1051
|
|
|
1052 but it can be issued if we use analogous `final_presence_set'. */
|
|
|
1053 DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA)
|
|
|
1054
|
|
|
1055 /* (absence_set string string) means that each CPU functional unit in
|
|
|
1056 the first string can be reserved only if each pattern of units
|
|
|
1057 whose names are in the second string is not reserved. This is an
|
|
|
1058 asymmetric relation (actually exclusion set is analogous to this
|
|
|
1059 one but it is symmetric). CPU units or unit patterns in the string
|
|
|
1060 are separated by commas. Pattern is one unit name or unit names
|
|
|
1061 separated by white-spaces.
|
|
|
1062
|
|
|
1063 For example, it is useful for description that slot0 can not be
|
|
|
1064 reserved after slot1 or slot2 reservation for a VLIW processor. We
|
|
|
1065 could describe it by the following construction
|
|
|
1066
|
|
|
1067 (absence_set "slot2" "slot0, slot1")
|
|
|
1068
|
|
|
1069 Or slot2 can not be reserved if slot0 and unit b0 are reserved or
|
|
|
1070 slot1 and unit b1 are reserved . In this case we could write
|
|
|
1071
|
|
|
1072 (absence_set "slot2" "slot0 b0, slot1 b1")
|
|
|
1073
|
|
|
1074 All CPU functional units in a set should to belong the same
|
|
|
1075 automaton. */
|
|
|
1076 DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA)
|
|
|
1077
|
|
|
1078 /* (final_absence_set string string) is analogous to `absence_set' but
|
|
|
1079 checking is done on the result (state) reservation. See comments
|
|
|
1080 for `final_presence_set'. */
|
|
|
1081 DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA)
|
|
|
1082
|
|
|
1083 /* (define_bypass number out_insn_names in_insn_names) names bypass
|
|
|
1084 with given latency (the first number) from insns given by the first
|
|
|
1085 string (see define_insn_reservation) into insns given by the second
|
|
|
1086 string. Insn names in the strings are separated by commas. The
|
|
|
1087 third operand is optional name of function which is additional
|
|
|
1088 guard for the bypass. The function will get the two insns as
|
|
|
1089 parameters. If the function returns zero the bypass will be
|
|
|
1090 ignored for this case. Additional guard is necessary to recognize
|
|
|
1091 complicated bypasses, e.g. when consumer is load address. */
|
|
|
1092 DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
|
|
|
1093
|
|
|
1094 /* (define_automaton string) describes names of automata generated and
|
|
|
1095 used for pipeline hazards recognition. The names are separated by
|
|
|
1096 comma. Actually it is possibly to generate the single automaton
|
|
|
1097 but unfortunately it can be very large. If we use more one
|
|
|
1098 automata, the summary size of the automata usually is less than the
|
|
|
1099 single one. The automaton name is used in define_cpu_unit and
|
|
|
1100 define_query_cpu_unit. All automata should have unique names. */
|
|
|
1101 DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA)
|
|
|
1102
|
|
|
1103 /* (automata_option string) describes option for generation of
|
|
|
1104 automata. Currently there are the following options:
|
|
|
1105
|
|
|
1106 o "no-minimization" which makes no minimization of automata. This
|
|
|
1107 is only worth to do when we are debugging the description and
|
|
|
1108 need to look more accurately at reservations of states.
|
|
|
1109
|
|
|
1110 o "time" which means printing additional time statistics about
|
|
|
1111 generation of automata.
|
|
|
1112
|
|
|
1113 o "v" which means generation of file describing the result
|
|
|
1114 automata. The file has suffix `.dfa' and can be used for the
|
|
|
1115 description verification and debugging.
|
|
|
1116
|
|
|
1117 o "w" which means generation of warning instead of error for
|
|
|
1118 non-critical errors.
|
|
|
1119
|
|
|
1120 o "ndfa" which makes nondeterministic finite state automata.
|
|
|
1121
|
|
|
1122 o "progress" which means output of a progress bar showing how many
|
|
|
1123 states were generated so far for automaton being processed. */
|
|
|
1124 DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA)
|
|
|
1125
|
|
|
1126 /* (define_reservation string string) names reservation (the first
|
|
|
1127 string) of cpu functional units (the 2nd string). Sometimes unit
|
|
|
1128 reservations for different insns contain common parts. In such
|
|
|
1129 case, you can describe common part and use its name (the 1st
|
|
|
1130 parameter) in regular expression in define_insn_reservation. All
|
|
|
1131 define_reservations, define_cpu_units, and define_query_cpu_units
|
|
|
1132 should have unique names which may not be "nothing". */
|
|
|
1133 DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA)
|
|
|
1134
|
|
|
1135 /* (define_insn_reservation name default_latency condition regexpr)
|
|
|
1136 describes reservation of cpu functional units (the 3nd operand) for
|
|
|
1137 instruction which is selected by the condition (the 2nd parameter).
|
|
|
1138 The first parameter is used for output of debugging information.
|
|
|
1139 The reservations are described by a regular expression according
|
|
|
1140 the following syntax:
|
|
|
1141
|
|
|
1142 regexp = regexp "," oneof
|
|
|
1143 | oneof
|
|
|
1144
|
|
|
1145 oneof = oneof "|" allof
|
|
|
1146 | allof
|
|
|
1147
|
|
|
1148 allof = allof "+" repeat
|
|
|
1149 | repeat
|
|
|
1150
|
|
|
1151 repeat = element "*" number
|
|
|
1152 | element
|
|
|
1153
|
|
|
1154 element = cpu_function_unit_name
|
|
|
1155 | reservation_name
|
|
|
1156 | result_name
|
|
|
1157 | "nothing"
|
|
|
1158 | "(" regexp ")"
|
|
|
1159
|
|
|
1160 1. "," is used for describing start of the next cycle in
|
|
|
1161 reservation.
|
|
|
1162
|
|
|
1163 2. "|" is used for describing the reservation described by the
|
|
|
1164 first regular expression *or* the reservation described by the
|
|
|
1165 second regular expression *or* etc.
|
|
|
1166
|
|
|
1167 3. "+" is used for describing the reservation described by the
|
|
|
1168 first regular expression *and* the reservation described by the
|
|
|
1169 second regular expression *and* etc.
|
|
|
1170
|
|
|
1171 4. "*" is used for convenience and simply means sequence in
|
|
|
1172 which the regular expression are repeated NUMBER times with
|
|
|
1173 cycle advancing (see ",").
|
|
|
1174
|
|
|
1175 5. cpu functional unit name which means its reservation.
|
|
|
1176
|
|
|
1177 6. reservation name -- see define_reservation.
|
|
|
1178
|
|
|
1179 7. string "nothing" means no units reservation. */
|
|
|
1180
|
|
|
1181 DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA)
|
|
|
1182
|
|
|
1183 /* Expressions used for insn attributes. */
|
|
|
1184
|
|
|
1185 /* Definition of an insn attribute.
|
|
|
1186 1st operand: name of the attribute
|
|
|
1187 2nd operand: comma-separated list of possible attribute values
|
|
|
1188 3rd operand: expression for the default value of the attribute. */
|
|
|
1189 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA)
|
|
|
1190
|
|
|
1191 /* Marker for the name of an attribute. */
|
|
|
1192 DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA)
|
|
|
1193
|
|
|
1194 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
|
|
|
1195 in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
|
|
|
1196 pattern.
|
|
|
1197
|
|
|
1198 (set_attr "name" "value") is equivalent to
|
|
|
1199 (set (attr "name") (const_string "value")) */
|
|
|
1200 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA)
|
|
|
1201
|
|
|
1202 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
|
|
|
1203 specify that attribute values are to be assigned according to the
|
|
|
1204 alternative matched.
|
|
|
1205
|
|
|
1206 The following three expressions are equivalent:
|
|
|
1207
|
|
|
1208 (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
|
|
|
1209 (eq_attrq "alternative" "2") (const_string "a2")]
|
|
|
1210 (const_string "a3")))
|
|
|
1211 (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
|
|
|
1212 (const_string "a3")])
|
|
|
1213 (set_attr "att" "a1,a2,a3")
|
|
|
1214 */
|
|
|
1215 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA)
|
|
|
1216
|
|
|
1217 /* A conditional expression true if the value of the specified attribute of
|
|
|
1218 the current insn equals the specified value. The first operand is the
|
|
|
1219 attribute name and the second is the comparison value. */
|
|
|
1220 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA)
|
|
|
1221
|
|
|
1222 /* A special case of the above representing a set of alternatives. The first
|
|
|
1223 operand is bitmap of the set, the second one is the default value. */
|
|
|
1224 DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", RTX_EXTRA)
|
|
|
1225
|
|
|
1226 /* A conditional expression which is true if the specified flag is
|
|
|
1227 true for the insn being scheduled in reorg.
|
|
|
1228
|
|
|
1229 genattr.c defines the following flags which can be tested by
|
|
|
1230 (attr_flag "foo") expressions in eligible_for_delay.
|
|
|
1231
|
|
|
1232 forward, backward, very_likely, likely, very_unlikely, and unlikely. */
|
|
|
1233
|
|
|
1234 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
|
|
|
1235
|
|
|
1236 /* General conditional. The first operand is a vector composed of pairs of
|
|
|
1237 expressions. The first element of each pair is evaluated, in turn.
|
|
|
1238 The value of the conditional is the second expression of the first pair
|
|
|
1239 whose first expression evaluates nonzero. If none of the expressions is
|
|
|
1240 true, the second operand will be used as the value of the conditional. */
|
|
|
1241 DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
|
|
|
1242
|
|
|
1243 #endif /* GENERATOR_FILE */
|
|
|
1244
|
|
|
1245 /*
|
|
|
1246 Local variables:
|
|
|
1247 mode:c
|
|
|
1248 End:
|
|
|
1249 */
|
