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comparison gcc/config/mips/predicates.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents 77e2b8dfacca
children 84e7813d76e9
comparison
equal deleted inserted replaced
68:561a7518be6b 111:04ced10e8804
1 ;; Predicate definitions for MIPS. 1 ;; Predicate definitions for MIPS.
2 ;; Copyright (C) 2004, 2007, 2008 Free Software Foundation, Inc. 2 ;; Copyright (C) 2004-2017 Free Software Foundation, Inc.
3 ;; 3 ;;
4 ;; This file is part of GCC. 4 ;; This file is part of GCC.
5 ;; 5 ;;
6 ;; GCC is free software; you can redistribute it and/or modify 6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by 7 ;; it under the terms of the GNU General Public License as published by
31 31
32 (define_predicate "arith_operand" 32 (define_predicate "arith_operand"
33 (ior (match_operand 0 "const_arith_operand") 33 (ior (match_operand 0 "const_arith_operand")
34 (match_operand 0 "register_operand"))) 34 (match_operand 0 "register_operand")))
35 35
36 (define_predicate "const_immlsa_operand"
37 (and (match_code "const_int")
38 (match_test "IN_RANGE (INTVAL (op), 1, 4)")))
39
40 (define_predicate "const_msa_branch_operand"
41 (and (match_code "const_int")
42 (match_test "IN_RANGE (INTVAL (op), -1024, 1023)")))
43
44 (define_predicate "const_uimm3_operand"
45 (and (match_code "const_int")
46 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
47
48 (define_predicate "const_uimm4_operand"
49 (and (match_code "const_int")
50 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
51
52 (define_predicate "const_uimm5_operand"
53 (and (match_code "const_int")
54 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
55
36 (define_predicate "const_uimm6_operand" 56 (define_predicate "const_uimm6_operand"
37 (and (match_code "const_int") 57 (and (match_code "const_int")
38 (match_test "UIMM6_OPERAND (INTVAL (op))"))) 58 (match_test "UIMM6_OPERAND (INTVAL (op))")))
59
60 (define_predicate "const_uimm8_operand"
61 (and (match_code "const_int")
62 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
63
64 (define_predicate "const_imm5_operand"
65 (and (match_code "const_int")
66 (match_test "IN_RANGE (INTVAL (op), -16, 15)")))
39 67
40 (define_predicate "const_imm10_operand" 68 (define_predicate "const_imm10_operand"
41 (and (match_code "const_int") 69 (and (match_code "const_int")
42 (match_test "IMM10_OPERAND (INTVAL (op))"))) 70 (match_test "IMM10_OPERAND (INTVAL (op))")))
43 71
44 (define_predicate "reg_imm10_operand" 72 (define_predicate "reg_imm10_operand"
45 (ior (match_operand 0 "const_imm10_operand") 73 (ior (match_operand 0 "const_imm10_operand")
46 (match_operand 0 "register_operand"))) 74 (match_operand 0 "register_operand")))
47 75
76 (define_predicate "aq10b_operand"
77 (and (match_code "const_int")
78 (match_test "mips_signed_immediate_p (INTVAL (op), 10, 0)")))
79
80 (define_predicate "aq10h_operand"
81 (and (match_code "const_int")
82 (match_test "mips_signed_immediate_p (INTVAL (op), 10, 1)")))
83
84 (define_predicate "aq10w_operand"
85 (and (match_code "const_int")
86 (match_test "mips_signed_immediate_p (INTVAL (op), 10, 2)")))
87
88 (define_predicate "aq10d_operand"
89 (and (match_code "const_int")
90 (match_test "mips_signed_immediate_p (INTVAL (op), 10, 3)")))
91
48 (define_predicate "sle_operand" 92 (define_predicate "sle_operand"
49 (and (match_code "const_int") 93 (and (match_code "const_int")
50 (match_test "SMALL_OPERAND (INTVAL (op) + 1)"))) 94 (match_test "SMALL_OPERAND (INTVAL (op) + 1)")))
51 95
52 (define_predicate "sleu_operand" 96 (define_predicate "sleu_operand"
55 99
56 (define_predicate "const_0_operand" 100 (define_predicate "const_0_operand"
57 (and (match_code "const_int,const_double,const_vector") 101 (and (match_code "const_int,const_double,const_vector")
58 (match_test "op == CONST0_RTX (GET_MODE (op))"))) 102 (match_test "op == CONST0_RTX (GET_MODE (op))")))
59 103
104 (define_predicate "const_m1_operand"
105 (and (match_code "const_int,const_double,const_vector")
106 (match_test "op == CONSTM1_RTX (GET_MODE (op))")))
107
108 (define_predicate "reg_or_m1_operand"
109 (ior (match_operand 0 "const_m1_operand")
110 (match_operand 0 "register_operand")))
111
60 (define_predicate "reg_or_0_operand" 112 (define_predicate "reg_or_0_operand"
61 (ior (and (match_operand 0 "const_0_operand") 113 (ior (and (match_operand 0 "const_0_operand")
62 (match_test "!TARGET_MIPS16")) 114 (not (match_test "TARGET_MIPS16")))
63 (match_operand 0 "register_operand"))) 115 (match_operand 0 "register_operand")))
64 116
65 (define_predicate "const_1_operand" 117 (define_predicate "const_1_operand"
66 (and (match_code "const_int,const_double,const_vector") 118 (and (match_code "const_int,const_double,const_vector")
67 (match_test "op == CONST1_RTX (GET_MODE (op))"))) 119 (match_test "op == CONST1_RTX (GET_MODE (op))")))
68 120
69 (define_predicate "reg_or_1_operand" 121 (define_predicate "reg_or_1_operand"
70 (ior (match_operand 0 "const_1_operand") 122 (ior (match_operand 0 "const_1_operand")
71 (match_operand 0 "register_operand"))) 123 (match_operand 0 "register_operand")))
72 124
125 ;; These are used in vec_merge, hence accept bitmask as const_int.
126 (define_predicate "const_exp_2_operand"
127 (and (match_code "const_int")
128 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 1)")))
129
130 (define_predicate "const_exp_4_operand"
131 (and (match_code "const_int")
132 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 3)")))
133
134 (define_predicate "const_exp_8_operand"
135 (and (match_code "const_int")
136 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 7)")))
137
138 (define_predicate "const_exp_16_operand"
139 (and (match_code "const_int")
140 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 15)")))
141
73 ;; This is used for indexing into vectors, and hence only accepts const_int. 142 ;; This is used for indexing into vectors, and hence only accepts const_int.
74 (define_predicate "const_0_or_1_operand" 143 (define_predicate "const_0_or_1_operand"
75 (and (match_code "const_int") 144 (and (match_code "const_int")
76 (ior (match_test "op == CONST0_RTX (GET_MODE (op))") 145 (match_test "IN_RANGE (INTVAL (op), 0, 1)")))
77 (match_test "op == CONST1_RTX (GET_MODE (op))")))) 146
147 (define_predicate "const_2_or_3_operand"
148 (and (match_code "const_int")
149 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
150
151 (define_predicate "const_0_to_3_operand"
152 (and (match_code "const_int")
153 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
78 154
79 (define_predicate "qi_mask_operand" 155 (define_predicate "qi_mask_operand"
80 (and (match_code "const_int") 156 (and (match_code "const_int")
81 (match_test "UINTVAL (op) == 0xff"))) 157 (match_test "UINTVAL (op) == 0xff")))
82 158
98 (match_code "const_int") 174 (match_code "const_int")
99 (match_test "low_bitmask_len (mode, INTVAL (op)) > 16"))) 175 (match_test "low_bitmask_len (mode, INTVAL (op)) > 16")))
100 176
101 (define_predicate "and_reg_operand" 177 (define_predicate "and_reg_operand"
102 (ior (match_operand 0 "register_operand") 178 (ior (match_operand 0 "register_operand")
103 (and (match_test "!TARGET_MIPS16") 179 (and (not (match_test "TARGET_MIPS16"))
104 (match_operand 0 "const_uns_arith_operand")) 180 (match_operand 0 "const_uns_arith_operand"))
105 (match_operand 0 "low_bitmask_operand") 181 (match_operand 0 "low_bitmask_operand")
106 (match_operand 0 "si_mask_operand"))) 182 (match_operand 0 "si_mask_operand")))
107 183
108 (define_predicate "and_operand" 184 (define_predicate "and_operand"
113 (and (match_code "reg") 189 (and (match_code "reg")
114 (match_test "TARGET_MIPS16 190 (match_test "TARGET_MIPS16
115 ? M16_REG_P (REGNO (op)) 191 ? M16_REG_P (REGNO (op))
116 : GP_REG_P (REGNO (op))"))) 192 : GP_REG_P (REGNO (op))")))
117 193
194 (define_predicate "lwsp_swsp_operand"
195 (and (match_code "mem")
196 (match_test "lwsp_swsp_address_p (XEXP (op, 0), mode)")))
197
198 (define_predicate "lw16_sw16_operand"
199 (and (match_code "mem")
200 (match_test "m16_based_address_p (XEXP (op, 0), mode, uw4_operand)")))
201
202 (define_predicate "lhu16_sh16_operand"
203 (and (match_code "mem")
204 (match_test "m16_based_address_p (XEXP (op, 0), mode, uh4_operand)")))
205
206 (define_predicate "lbu16_operand"
207 (and (match_code "mem")
208 (match_test "m16_based_address_p (XEXP (op, 0), mode, db4_operand)")))
209
210 (define_predicate "sb16_operand"
211 (and (match_code "mem")
212 (match_test "m16_based_address_p (XEXP (op, 0), mode, ub4_operand)")))
213
214 (define_predicate "db4_operand"
215 (and (match_code "const_int")
216 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)")))
217
218 (define_predicate "db7_operand"
219 (and (match_code "const_int")
220 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)")))
221
222 (define_predicate "db8_operand"
223 (and (match_code "const_int")
224 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 8, 0)")))
225
226 (define_predicate "ib3_operand"
227 (and (match_code "const_int")
228 (match_test "mips_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)")))
229
230 (define_predicate "sb4_operand"
231 (and (match_code "const_int")
232 (match_test "mips_signed_immediate_p (INTVAL (op), 4, 0)")))
233
234 (define_predicate "sb5_operand"
235 (and (match_code "const_int")
236 (match_test "mips_signed_immediate_p (INTVAL (op), 5, 0)")))
237
238 (define_predicate "sb8_operand"
239 (and (match_code "const_int")
240 (match_test "mips_signed_immediate_p (INTVAL (op), 8, 0)")))
241
242 (define_predicate "sd8_operand"
243 (and (match_code "const_int")
244 (match_test "mips_signed_immediate_p (INTVAL (op), 8, 3)")))
245
246 (define_predicate "ub4_operand"
247 (and (match_code "const_int")
248 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 0)")))
249
250 (define_predicate "ub8_operand"
251 (and (match_code "const_int")
252 (match_test "mips_unsigned_immediate_p (INTVAL (op), 8, 0)")))
253
254 (define_predicate "uh4_operand"
255 (and (match_code "const_int")
256 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 1)")))
257
258 (define_predicate "uw4_operand"
259 (and (match_code "const_int")
260 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 2)")))
261
262 (define_predicate "uw5_operand"
263 (and (match_code "const_int")
264 (match_test "mips_unsigned_immediate_p (INTVAL (op), 5, 2)")))
265
266 (define_predicate "uw6_operand"
267 (and (match_code "const_int")
268 (match_test "mips_unsigned_immediate_p (INTVAL (op), 6, 2)")))
269
270 (define_predicate "uw8_operand"
271 (and (match_code "const_int")
272 (match_test "mips_unsigned_immediate_p (INTVAL (op), 8, 2)")))
273
274 (define_predicate "addiur2_operand"
275 (and (match_code "const_int")
276 (ior (match_test "INTVAL (op) == -1")
277 (match_test "INTVAL (op) == 1")
278 (match_test "INTVAL (op) == 4")
279 (match_test "INTVAL (op) == 8")
280 (match_test "INTVAL (op) == 12")
281 (match_test "INTVAL (op) == 16")
282 (match_test "INTVAL (op) == 20")
283 (match_test "INTVAL (op) == 24"))))
284
285 (define_predicate "addiusp_operand"
286 (and (match_code "const_int")
287 (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))")
288 (match_test "(IN_RANGE (INTVAL (op), -258, -3))"))))
289
290 (define_predicate "andi16_operand"
291 (and (match_code "const_int")
292 (ior (match_test "IN_RANGE (INTVAL (op), 1, 4)")
293 (match_test "IN_RANGE (INTVAL (op), 7, 8)")
294 (match_test "IN_RANGE (INTVAL (op), 15, 16)")
295 (match_test "IN_RANGE (INTVAL (op), 31, 32)")
296 (match_test "IN_RANGE (INTVAL (op), 63, 64)")
297 (match_test "INTVAL (op) == 255")
298 (match_test "INTVAL (op) == 32768")
299 (match_test "INTVAL (op) == 65535"))))
300
301 (define_predicate "movep_src_register"
302 (and (match_code "reg")
303 (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)"))
304 (match_test ("IN_RANGE (REGNO (op), 16, 20)")))))
305
306 (define_predicate "movep_src_operand"
307 (ior (match_operand 0 "const_0_operand")
308 (match_operand 0 "movep_src_register")))
309
118 (define_predicate "lo_operand" 310 (define_predicate "lo_operand"
119 (and (match_code "reg") 311 (and (match_code "reg")
120 (match_test "REGNO (op) == LO_REGNUM"))) 312 (match_test "REGNO (op) == LO_REGNUM")))
121 313
122 (define_predicate "hilo_operand" 314 (define_predicate "hilo_operand"
125 317
126 (define_predicate "fcc_reload_operand" 318 (define_predicate "fcc_reload_operand"
127 (and (match_code "reg,subreg") 319 (and (match_code "reg,subreg")
128 (match_test "ST_REG_P (true_regnum (op))"))) 320 (match_test "ST_REG_P (true_regnum (op))")))
129 321
130 (define_special_predicate "pc_or_label_operand" 322 (define_predicate "muldiv_target_operand"
131 (match_code "pc,label_ref")) 323 (if_then_else (match_test "TARGET_MIPS16")
324 (match_operand 0 "hilo_operand")
325 (match_operand 0 "register_operand")))
132 326
133 (define_predicate "const_call_insn_operand" 327 (define_predicate "const_call_insn_operand"
134 (match_code "const,symbol_ref,label_ref") 328 (match_code "const,symbol_ref,label_ref")
135 { 329 {
136 enum mips_symbol_type symbol_type; 330 enum mips_symbol_type symbol_type;
171 ;; A legitimate CONST_INT operand that takes more than one instruction 365 ;; A legitimate CONST_INT operand that takes more than one instruction
172 ;; to load. 366 ;; to load.
173 (define_predicate "splittable_const_int_operand" 367 (define_predicate "splittable_const_int_operand"
174 (match_code "const_int") 368 (match_code "const_int")
175 { 369 {
176 /* When generating mips16 code, LEGITIMATE_CONSTANT_P rejects 370 /* When generating mips16 code, TARGET_LEGITIMATE_CONSTANT_P rejects
177 CONST_INTs that can't be loaded using simple insns. */ 371 CONST_INTs that can't be loaded using simple insns. */
178 if (TARGET_MIPS16) 372 if (TARGET_MIPS16)
179 return false; 373 return false;
180 374
181 /* Don't handle multi-word moves this way; we don't want to introduce 375 /* Don't handle multi-word moves this way; we don't want to introduce
187 instruction. */ 381 instruction. */
188 return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op); 382 return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op);
189 }) 383 })
190 384
191 (define_predicate "move_operand" 385 (define_predicate "move_operand"
192 (match_operand 0 "general_operand") 386 ;; Allow HI and LO to be used as the source of a MIPS16 move.
387 (ior (match_operand 0 "general_operand")
388 (match_operand 0 "hilo_operand"))
193 { 389 {
194 enum mips_symbol_type symbol_type; 390 enum mips_symbol_type symbol_type;
195 391
196 /* The thinking here is as follows: 392 /* The thinking here is as follows:
197 393
272 enum mips_symbol_type type; 468 enum mips_symbol_type type;
273 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 469 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
274 && type == SYMBOL_ABSOLUTE); 470 && type == SYMBOL_ABSOLUTE);
275 }) 471 })
276 472
473 (define_predicate "symbolic_operand_with_high"
474 (match_code "const,symbol_ref,label_ref")
475 {
476 enum mips_symbol_type type;
477 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
478 && mips_hi_relocs[(int) type]);
479 })
480
277 (define_predicate "force_to_mem_operand" 481 (define_predicate "force_to_mem_operand"
278 (match_code "const,symbol_ref,label_ref") 482 (match_code "const,symbol_ref,label_ref")
279 { 483 {
280 enum mips_symbol_type symbol_type; 484 enum mips_symbol_type symbol_type;
281 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type) 485 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
282 && symbol_type == SYMBOL_FORCE_TO_MEM); 486 && mips_use_pcrel_pool_p[(int) symbol_type]);
283 }) 487 })
284 488
285 (define_predicate "got_disp_operand" 489 (define_predicate "got_disp_operand"
286 (match_code "const,symbol_ref,label_ref") 490 (match_code "const,symbol_ref,label_ref")
287 { 491 {
294 (match_code "const,symbol_ref,label_ref") 498 (match_code "const,symbol_ref,label_ref")
295 { 499 {
296 enum mips_symbol_type type; 500 enum mips_symbol_type type;
297 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 501 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
298 && type == SYMBOL_GOT_PAGE_OFST); 502 && type == SYMBOL_GOT_PAGE_OFST);
503 })
504
505 (define_predicate "tls_reloc_operand"
506 (match_code "const,symbol_ref,label_ref")
507 {
508 enum mips_symbol_type type;
509 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
510 && (type == SYMBOL_DTPREL || type == SYMBOL_TPREL));
299 }) 511 })
300 512
301 (define_predicate "symbol_ref_operand" 513 (define_predicate "symbol_ref_operand"
302 (match_code "symbol_ref")) 514 (match_code "symbol_ref"))
303 515
326 538
327 (define_predicate "trap_comparison_operator" 539 (define_predicate "trap_comparison_operator"
328 (match_code "eq,ne,lt,ltu,ge,geu")) 540 (match_code "eq,ne,lt,ltu,ge,geu"))
329 541
330 (define_predicate "order_operator" 542 (define_predicate "order_operator"
331 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) 543 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")
544 {
545 if (XEXP (op, 1) == const0_rtx)
546 return true;
547
548 if (TARGET_CB_MAYBE
549 && (GET_CODE (op) == LT || GET_CODE (op) == LTU
550 || GET_CODE (op) == GE || GET_CODE (op) == GEU))
551 return true;
552
553 return false;
554 })
332 555
333 ;; For NE, cstore uses sltu instructions in which the first operand is $0. 556 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
334 ;; This isn't possible in mips16 code. 557 ;; This isn't possible in mips16 code.
335 558
336 (define_predicate "mips_cstore_operator" 559 (define_predicate "mips_cstore_operator"
337 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu") 560 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu")
338 (and (match_code "ne") (match_test "!TARGET_MIPS16")))) 561 (and (match_code "ne") (not (match_test "TARGET_MIPS16")))))
339 562
340 (define_predicate "small_data_pattern" 563 (define_predicate "small_data_pattern"
341 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch") 564 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
342 (match_test "mips_small_data_pattern_p (op)"))) 565 (match_test "mips_small_data_pattern_p (op)")))
566
567 (define_predicate "mem_noofs_operand"
568 (and (match_code "mem")
569 (match_code "reg" "0")))
570
571 ;; Return 1 if the operand is in non-volatile memory.
572 (define_predicate "non_volatile_mem_operand"
573 (and (match_operand 0 "memory_operand")
574 (not (match_test "MEM_VOLATILE_P (op)"))))
575
576 (define_predicate "const_vector_same_val_operand"
577 (match_code "const_vector")
578 {
579 return mips_const_vector_same_val_p (op, mode);
580 })
581
582 (define_predicate "const_vector_same_simm5_operand"
583 (match_code "const_vector")
584 {
585 return mips_const_vector_same_int_p (op, mode, -16, 15);
586 })
587
588 (define_predicate "const_vector_same_uimm5_operand"
589 (match_code "const_vector")
590 {
591 return mips_const_vector_same_int_p (op, mode, 0, 31);
592 })
593
594 (define_predicate "const_vector_same_ximm5_operand"
595 (match_code "const_vector")
596 {
597 return mips_const_vector_same_int_p (op, mode, -31, 31);
598 })
599
600 (define_predicate "const_vector_same_uimm6_operand"
601 (match_code "const_vector")
602 {
603 return mips_const_vector_same_int_p (op, mode, 0, 63);
604 })
605
606 (define_predicate "const_vector_same_uimm8_operand"
607 (match_code "const_vector")
608 {
609 return mips_const_vector_same_int_p (op, mode, 0, 255);
610 })
611
612 (define_predicate "par_const_vector_shf_set_operand"
613 (match_code "parallel")
614 {
615 return mips_const_vector_shuffle_set_p (op, mode);
616 })
617
618 (define_predicate "reg_or_vector_same_val_operand"
619 (ior (match_operand 0 "register_operand")
620 (match_operand 0 "const_vector_same_val_operand")))
621
622 (define_predicate "reg_or_vector_same_simm5_operand"
623 (ior (match_operand 0 "register_operand")
624 (match_operand 0 "const_vector_same_simm5_operand")))
625
626 (define_predicate "reg_or_vector_same_uimm5_operand"
627 (ior (match_operand 0 "register_operand")
628 (match_operand 0 "const_vector_same_uimm5_operand")))
629
630 (define_predicate "reg_or_vector_same_ximm5_operand"
631 (ior (match_operand 0 "register_operand")
632 (match_operand 0 "const_vector_same_ximm5_operand")))
633
634 (define_predicate "reg_or_vector_same_uimm6_operand"
635 (ior (match_operand 0 "register_operand")
636 (match_operand 0 "const_vector_same_uimm6_operand")))