comparison gcc/config/rs6000/paired.md @ 67:f6334be47118

update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents 77e2b8dfacca
children 04ced10e8804
comparison
equal deleted inserted replaced
65:65488c3d617d 67:f6334be47118
1 ;; PowerPC paired single and double hummer description 1 ;; PowerPC paired single and double hummer description
2 ;; Copyright (C) 2007, 2009 2 ;; Copyright (C) 2007, 2009, 2010
3 ;; Free Software Foundation, Inc. 3 ;; Free Software Foundation, Inc.
4 ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres 4 ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres
5 ;; <eres@il.ibm.com> 5 ;; <eres@il.ibm.com>
6 6
7 ;; This file is part of GCC. 7 ;; This file is part of GCC.
94 "ps_div %0,%1,%2" 94 "ps_div %0,%1,%2"
95 [(set_attr "type" "sdiv")]) 95 [(set_attr "type" "sdiv")])
96 96
97 (define_insn "paired_madds0" 97 (define_insn "paired_madds0"
98 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 98 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
99 (vec_concat:V2SF 99 (vec_concat:V2SF
100 (plus:SF (mult:SF (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 100 (fma:SF
101 (parallel [(const_int 0)])) 101 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
102 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 102 (parallel [(const_int 0)]))
103 (parallel [(const_int 0)]))) 103 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
104 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f") 104 (parallel [(const_int 0)]))
105 (parallel [(const_int 0)]))) 105 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f")
106 (plus:SF (mult:SF (vec_select:SF (match_dup 1) 106 (parallel [(const_int 0)])))
107 (parallel [(const_int 1)])) 107 (fma:SF
108 (vec_select:SF (match_dup 2) 108 (vec_select:SF (match_dup 1)
109 (parallel [(const_int 0)]))) 109 (parallel [(const_int 1)]))
110 (vec_select:SF (match_dup 3) 110 (vec_select:SF (match_dup 2)
111 (parallel [(const_int 1)])))))] 111 (parallel [(const_int 0)]))
112 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD" 112 (vec_select:SF (match_dup 3)
113 (parallel [(const_int 1)])))))]
114 "TARGET_PAIRED_FLOAT"
113 "ps_madds0 %0,%1,%2,%3" 115 "ps_madds0 %0,%1,%2,%3"
114 [(set_attr "type" "fp")]) 116 [(set_attr "type" "fp")])
115 117
116 (define_insn "paired_madds1" 118 (define_insn "paired_madds1"
117 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 119 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
118 (vec_concat:V2SF 120 (vec_concat:V2SF
119 (plus:SF (mult:SF (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 121 (fma:SF
120 (parallel [(const_int 0)])) 122 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
121 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 123 (parallel [(const_int 0)]))
122 (parallel [(const_int 1)]))) 124 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
123 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f") 125 (parallel [(const_int 1)]))
124 (parallel [(const_int 0)]))) 126 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f")
125 (plus:SF (mult:SF (vec_select:SF (match_dup 1) 127 (parallel [(const_int 0)])))
126 (parallel [(const_int 1)])) 128 (fma:SF
127 (vec_select:SF (match_dup 2) 129 (vec_select:SF (match_dup 1)
128 (parallel [(const_int 1)]))) 130 (parallel [(const_int 1)]))
129 (vec_select:SF (match_dup 3) 131 (vec_select:SF (match_dup 2)
130 (parallel [(const_int 1)])))))] 132 (parallel [(const_int 1)]))
131 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD" 133 (vec_select:SF (match_dup 3)
134 (parallel [(const_int 1)])))))]
135 "TARGET_PAIRED_FLOAT"
132 "ps_madds1 %0,%1,%2,%3" 136 "ps_madds1 %0,%1,%2,%3"
133 [(set_attr "type" "fp")]) 137 [(set_attr "type" "fp")])
134 138
135 (define_insn "paired_madd" 139 (define_insn "*paired_madd"
136 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 140 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
137 (plus:V2SF (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 141 (fma:V2SF
138 (match_operand:V2SF 2 "gpc_reg_operand" "f")) 142 (match_operand:V2SF 1 "gpc_reg_operand" "f")
139 (match_operand:V2SF 3 "gpc_reg_operand" "f")))] 143 (match_operand:V2SF 2 "gpc_reg_operand" "f")
140 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD" 144 (match_operand:V2SF 3 "gpc_reg_operand" "f")))]
145 "TARGET_PAIRED_FLOAT"
141 "ps_madd %0,%1,%2,%3" 146 "ps_madd %0,%1,%2,%3"
142 [(set_attr "type" "fp")]) 147 [(set_attr "type" "fp")])
143 148
144 (define_insn "paired_msub" 149 (define_insn "*paired_msub"
145 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 150 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
146 (minus:V2SF (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 151 (fma:V2SF
147 (match_operand:V2SF 2 "gpc_reg_operand" "f")) 152 (match_operand:V2SF 1 "gpc_reg_operand" "f")
148 (match_operand:V2SF 3 "gpc_reg_operand" "f")))] 153 (match_operand:V2SF 2 "gpc_reg_operand" "f")
149 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD" 154 (neg:V2SF (match_operand:V2SF 3 "gpc_reg_operand" "f"))))]
155 "TARGET_PAIRED_FLOAT"
150 "ps_msub %0,%1,%2,%3" 156 "ps_msub %0,%1,%2,%3"
151 [(set_attr "type" "fp")]) 157 [(set_attr "type" "fp")])
152 158
153 (define_insn "paired_nmadd" 159 (define_insn "*paired_nmadd"
154 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 160 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
155 (neg:V2SF (plus:V2SF (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 161 (neg:V2SF
156 (match_operand:V2SF 2 "gpc_reg_operand" "f")) 162 (fma:V2SF
157 (match_operand:V2SF 3 "gpc_reg_operand" "f"))))] 163 (match_operand:V2SF 1 "gpc_reg_operand" "f")
158 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD 164 (match_operand:V2SF 2 "gpc_reg_operand" "f")
159 && HONOR_SIGNED_ZEROS (SFmode)" 165 (match_operand:V2SF 3 "gpc_reg_operand" "f"))))]
166 "TARGET_PAIRED_FLOAT"
160 "ps_nmadd %0,%1,%2,%3" 167 "ps_nmadd %0,%1,%2,%3"
161 [(set_attr "type" "fp")]) 168 [(set_attr "type" "fp")])
162 169
163 (define_insn "paired_nmsub" 170 (define_insn "*paired_nmsub"
164 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 171 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
165 (neg:V2SF (minus:V2SF (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 172 (neg:V2SF
166 (match_operand:V2SF 2 "gpc_reg_operand" "f")) 173 (fma:V2SF
167 (match_operand:V2SF 3 "gpc_reg_operand" "f"))))] 174 (match_operand:V2SF 1 "gpc_reg_operand" "f")
168 "TARGET_PAIRED_FLOAT && TARGET_FUSED_MADD 175 (match_operand:V2SF 2 "gpc_reg_operand" "f")
169 && HONOR_SIGNED_ZEROS (DFmode)" 176 (neg:V2SF (match_operand:V2SF 3 "gpc_reg_operand" "f")))))]
177 "TARGET_PAIRED_FLOAT"
170 "ps_nmsub %0,%1,%2,%3" 178 "ps_nmsub %0,%1,%2,%3"
171 [(set_attr "type" "dmul")]) 179 [(set_attr "type" "dmul")])
172 180
173 (define_insn "selv2sf4" 181 (define_insn "selv2sf4"
174 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 182 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")