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annotate llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll @ 173:0572611fdcc8 llvm10 llvm12

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reorgnization done
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 11:55:54 +0900
parents 1d019706d866
children 1f2b6ac9f198
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt -codegenprepare -mtriple=x86_64-unknown-unknown -force-split-store -S < %s | FileCheck %s
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3
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4 target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:32-n8:16:32-a:0:32-S32"
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5 target triple = "i686-w64-windows-gnu"
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6
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7 define void @split_store_align1(float %x, i64* %p) {
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8 ; CHECK-LABEL: @split_store_align1(
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9 ; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
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10 ; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
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11 ; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
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12 ; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
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13 ; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
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14 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
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15 ; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 1
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16 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
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17 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
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18 ; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 1
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19 ; CHECK-NEXT: ret void
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20 ;
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21 %b = bitcast float %x to i32
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22 %z = zext i32 0 to i64
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23 %s = shl nuw nsw i64 %z, 32
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24 %z2 = zext i32 %b to i64
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25 %o = or i64 %s, %z2
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26 store i64 %o, i64* %p, align 1
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27 ret void
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28 }
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29
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30 define void @split_store_align2(float %x, i64* %p) {
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31 ; CHECK-LABEL: @split_store_align2(
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32 ; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
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33 ; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
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34 ; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
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35 ; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
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36 ; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
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37 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
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38 ; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 2
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39 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
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40 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
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41 ; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 2
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42 ; CHECK-NEXT: ret void
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43 ;
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44 %b = bitcast float %x to i32
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45 %z = zext i32 0 to i64
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46 %s = shl nuw nsw i64 %z, 32
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47 %z2 = zext i32 %b to i64
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48 %o = or i64 %s, %z2
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49 store i64 %o, i64* %p, align 2
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50 ret void
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51 }
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52
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53 define void @split_store_align8(float %x, i64* %p) {
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54 ; CHECK-LABEL: @split_store_align8(
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55 ; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
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56 ; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
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57 ; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
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58 ; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
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59 ; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
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60 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
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61 ; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 8
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62 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
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63 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
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64 ; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 4
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65 ; CHECK-NEXT: ret void
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66 ;
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67 %b = bitcast float %x to i32
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68 %z = zext i32 0 to i64
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69 %s = shl nuw nsw i64 %z, 32
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70 %z2 = zext i32 %b to i64
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71 %o = or i64 %s, %z2
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72 store i64 %o, i64* %p, align 8
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73 ret void
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74 }