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1 //===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9
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10 #include "LanaiFixupKinds.h"
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11 #include "MCTargetDesc/LanaiMCTargetDesc.h"
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12 #include "llvm/MC/MCAsmBackend.h"
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13 #include "llvm/MC/MCAssembler.h"
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14 #include "llvm/MC/MCDirectives.h"
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15 #include "llvm/MC/MCELFObjectWriter.h"
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16 #include "llvm/MC/MCFixupKindInfo.h"
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17 #include "llvm/MC/MCObjectWriter.h"
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18 #include "llvm/MC/MCSubtargetInfo.h"
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19 #include "llvm/Support/ErrorHandling.h"
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20 #include "llvm/Support/raw_ostream.h"
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21
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22 using namespace llvm;
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23
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24 // Prepare value for the target space
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25 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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26 switch (Kind) {
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27 case FK_Data_1:
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28 case FK_Data_2:
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29 case FK_Data_4:
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30 case FK_Data_8:
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31 return Value;
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32 case Lanai::FIXUP_LANAI_21:
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33 case Lanai::FIXUP_LANAI_21_F:
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34 case Lanai::FIXUP_LANAI_25:
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35 case Lanai::FIXUP_LANAI_32:
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36 case Lanai::FIXUP_LANAI_HI16:
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37 case Lanai::FIXUP_LANAI_LO16:
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38 return Value;
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39 default:
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40 llvm_unreachable("Unknown fixup kind!");
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41 }
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42 }
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43
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44 namespace {
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45 class LanaiAsmBackend : public MCAsmBackend {
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46 Triple::OSType OSType;
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47
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48 public:
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49 LanaiAsmBackend(const Target &T, Triple::OSType OST)
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50 : MCAsmBackend(), OSType(OST) {}
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51
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52 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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53 uint64_t Value, bool IsPCRel) const override;
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54
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55 MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override;
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56
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57 // No instruction requires relaxation
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58 bool fixupNeedsRelaxation(const MCFixup & /*Fixup*/, uint64_t /*Value*/,
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59 const MCRelaxableFragment * /*DF*/,
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60 const MCAsmLayout & /*Layout*/) const override {
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61 return false;
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62 }
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63
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64 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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65
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66 unsigned getNumFixupKinds() const override {
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67 return Lanai::NumTargetFixupKinds;
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68 }
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69
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70 bool mayNeedRelaxation(const MCInst & /*Inst*/) const override {
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71 return false;
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72 }
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73
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74 void relaxInstruction(const MCInst & /*Inst*/,
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75 const MCSubtargetInfo & /*STI*/,
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76 MCInst & /*Res*/) const override {}
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77
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78 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
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79 };
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80
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81 bool LanaiAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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82 if ((Count % 4) != 0)
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83 return false;
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84
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85 for (uint64_t i = 0; i < Count; i += 4)
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86 OW->write32(0x15000000);
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87
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88 return true;
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89 }
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90
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91 void LanaiAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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92 unsigned /*DataSize*/, uint64_t Value,
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93 bool /*IsPCRel*/) const {
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94 MCFixupKind Kind = Fixup.getKind();
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95 Value = adjustFixupValue(static_cast<unsigned>(Kind), Value);
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96
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97 if (!Value)
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98 return; // This value doesn't change the encoding
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99
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100 // Where in the object and where the number of bytes that need
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101 // fixing up
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102 unsigned Offset = Fixup.getOffset();
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103 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
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104 unsigned FullSize = 4;
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105
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106 // Grab current value, if any, from bits.
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107 uint64_t CurVal = 0;
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108
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109 // Load instruction and apply value
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110 for (unsigned i = 0; i != NumBytes; ++i) {
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111 unsigned Idx = (FullSize - 1 - i);
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112 CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Offset + Idx]))
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113 << (i * 8);
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114 }
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115
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116 uint64_t Mask =
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117 (static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
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118 CurVal |= Value & Mask;
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119
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120 // Write out the fixed up bytes back to the code/data bits.
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121 for (unsigned i = 0; i != NumBytes; ++i) {
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122 unsigned Idx = (FullSize - 1 - i);
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123 Data[Offset + Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff);
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124 }
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125 }
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126
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127 MCObjectWriter *
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128 LanaiAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
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129 return createLanaiELFObjectWriter(OS,
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130 MCELFObjectTargetWriter::getOSABI(OSType));
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131 }
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132
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133 const MCFixupKindInfo &
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134 LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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135 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
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136 // This table *must* be in same the order of fixup_* kinds in
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137 // LanaiFixupKinds.h.
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138 // Note: The number of bits indicated here are assumed to be contiguous.
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139 // This does not hold true for LANAI_21 and LANAI_21_F which are applied
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140 // to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
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141 // here are used only for cosmetic purposes, we set the size to 16 bits
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142 // for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
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143 // no bits are set in the fixup range.
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144 //
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145 // name offset bits flags
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146 {"FIXUP_LANAI_NONE", 0, 32, 0},
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147 {"FIXUP_LANAI_21", 16, 16 /*21*/, 0},
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148 {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0},
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149 {"FIXUP_LANAI_25", 7, 25, 0},
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150 {"FIXUP_LANAI_32", 0, 32, 0},
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151 {"FIXUP_LANAI_HI16", 16, 16, 0},
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152 {"FIXUP_LANAI_LO16", 16, 16, 0}};
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153
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154 if (Kind < FirstTargetFixupKind)
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155 return MCAsmBackend::getFixupKindInfo(Kind);
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156
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157 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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158 "Invalid kind!");
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159 return Infos[Kind - FirstTargetFixupKind];
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160 }
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161
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162 } // namespace
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163
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164 MCAsmBackend *llvm::createLanaiAsmBackend(const Target &T,
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165 const MCRegisterInfo & /*MRI*/,
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166 const Triple &TT, StringRef /*CPU*/,
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167 const MCTargetOptions & /*Options*/) {
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168 if (!TT.isOSBinFormatELF())
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169 llvm_unreachable("OS not supported");
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170
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171 return new LanaiAsmBackend(T, TT.getOS());
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172 }
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