150
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt -basicaa -loop-distribute -enable-loop-distribute -S -enable-mem-access-versioning=0 < %s | FileCheck %s
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3
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4 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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5
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6 ; PredicatedScalarEvolution decides it needs to insert a bounds check
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7 ; not based on memory access.
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8
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9 define void @f(i32* noalias %a, i32* noalias %b, i32* noalias %c, i32* noalias %d, i32* noalias %e, i64 %N) {
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10 ; CHECK-LABEL: @f(
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11 ; CHECK-NEXT: entry:
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12 ; CHECK-NEXT: [[A2:%.*]] = ptrtoint i32* [[A:%.*]] to i64
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13 ; CHECK-NEXT: br label [[FOR_BODY_LVER_CHECK:%.*]]
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14 ; CHECK: for.body.lver.check:
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15 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
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16 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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17 ; CHECK-NEXT: [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 2, i32 [[TMP1]])
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18 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0
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19 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1
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20 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 0, [[MUL_RESULT]]
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21 ; CHECK-NEXT: [[TMP3:%.*]] = sub i32 0, [[MUL_RESULT]]
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22 ; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 0
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23 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[TMP2]], 0
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24 ; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i1 [[TMP4]], i1 [[TMP5]]
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25 ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
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26 ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
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27 ; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]]
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28 ; CHECK-NEXT: [[TMP10:%.*]] = or i1 false, [[TMP9]]
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29 ; CHECK-NEXT: [[MUL3:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 8, i64 [[TMP0]])
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30 ; CHECK-NEXT: [[MUL_RESULT4:%.*]] = extractvalue { i64, i1 } [[MUL3]], 0
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31 ; CHECK-NEXT: [[MUL_OVERFLOW5:%.*]] = extractvalue { i64, i1 } [[MUL3]], 1
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32 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[A2]], [[MUL_RESULT4]]
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33 ; CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[A2]], [[MUL_RESULT4]]
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34 ; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt i64 [[TMP12]], [[A2]]
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35 ; CHECK-NEXT: [[TMP14:%.*]] = icmp ult i64 [[TMP11]], [[A2]]
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36 ; CHECK-NEXT: [[TMP15:%.*]] = select i1 false, i1 [[TMP13]], i1 [[TMP14]]
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37 ; CHECK-NEXT: [[TMP16:%.*]] = or i1 [[TMP15]], [[MUL_OVERFLOW5]]
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38 ; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP10]], [[TMP16]]
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39 ; CHECK-NEXT: br i1 [[TMP17]], label [[FOR_BODY_PH_LVER_ORIG:%.*]], label [[FOR_BODY_PH_LDIST1:%.*]]
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40 ; CHECK: for.body.ph.lver.orig:
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41 ; CHECK-NEXT: br label [[FOR_BODY_LVER_ORIG:%.*]]
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42 ; CHECK: for.body.lver.orig:
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43 ; CHECK-NEXT: [[IND_LVER_ORIG:%.*]] = phi i64 [ 0, [[FOR_BODY_PH_LVER_ORIG]] ], [ [[ADD_LVER_ORIG:%.*]], [[FOR_BODY_LVER_ORIG]] ]
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44 ; CHECK-NEXT: [[IND1_LVER_ORIG:%.*]] = phi i32 [ 0, [[FOR_BODY_PH_LVER_ORIG]] ], [ [[INC1_LVER_ORIG:%.*]], [[FOR_BODY_LVER_ORIG]] ]
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45 ; CHECK-NEXT: [[MUL_LVER_ORIG:%.*]] = mul i32 [[IND1_LVER_ORIG]], 2
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46 ; CHECK-NEXT: [[MUL_EXT_LVER_ORIG:%.*]] = zext i32 [[MUL_LVER_ORIG]] to i64
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47 ; CHECK-NEXT: [[ARRAYIDXA_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[MUL_EXT_LVER_ORIG]]
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48 ; CHECK-NEXT: [[LOADA_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXA_LVER_ORIG]], align 4
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49 ; CHECK-NEXT: [[ARRAYIDXB_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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50 ; CHECK-NEXT: [[LOADB_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXB_LVER_ORIG]], align 4
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51 ; CHECK-NEXT: [[MULA_LVER_ORIG:%.*]] = mul i32 [[LOADB_LVER_ORIG]], [[LOADA_LVER_ORIG]]
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52 ; CHECK-NEXT: [[ADD_LVER_ORIG]] = add nuw nsw i64 [[IND_LVER_ORIG]], 1
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53 ; CHECK-NEXT: [[INC1_LVER_ORIG]] = add i32 [[IND1_LVER_ORIG]], 1
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54 ; CHECK-NEXT: [[ARRAYIDXA_PLUS_4_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD_LVER_ORIG]]
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55 ; CHECK-NEXT: store i32 [[MULA_LVER_ORIG]], i32* [[ARRAYIDXA_PLUS_4_LVER_ORIG]], align 4
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56 ; CHECK-NEXT: [[ARRAYIDXD_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[D:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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57 ; CHECK-NEXT: [[LOADD_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXD_LVER_ORIG]], align 4
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58 ; CHECK-NEXT: [[ARRAYIDXE_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[E:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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59 ; CHECK-NEXT: [[LOADE_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXE_LVER_ORIG]], align 4
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60 ; CHECK-NEXT: [[MULC_LVER_ORIG:%.*]] = mul i32 [[LOADD_LVER_ORIG]], [[LOADE_LVER_ORIG]]
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61 ; CHECK-NEXT: [[ARRAYIDXC_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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62 ; CHECK-NEXT: store i32 [[MULC_LVER_ORIG]], i32* [[ARRAYIDXC_LVER_ORIG]], align 4
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63 ; CHECK-NEXT: [[EXITCOND_LVER_ORIG:%.*]] = icmp eq i64 [[ADD_LVER_ORIG]], [[N]]
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64 ; CHECK-NEXT: br i1 [[EXITCOND_LVER_ORIG]], label [[FOR_END:%.*]], label [[FOR_BODY_LVER_ORIG]]
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65 ; CHECK: for.body.ph.ldist1:
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66 ; CHECK-NEXT: br label [[FOR_BODY_LDIST1:%.*]]
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67 ; CHECK: for.body.ldist1:
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68 ; CHECK-NEXT: [[IND_LDIST1:%.*]] = phi i64 [ 0, [[FOR_BODY_PH_LDIST1]] ], [ [[ADD_LDIST1:%.*]], [[FOR_BODY_LDIST1]] ]
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69 ; CHECK-NEXT: [[IND1_LDIST1:%.*]] = phi i32 [ 0, [[FOR_BODY_PH_LDIST1]] ], [ [[INC1_LDIST1:%.*]], [[FOR_BODY_LDIST1]] ]
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70 ; CHECK-NEXT: [[MUL_LDIST1:%.*]] = mul i32 [[IND1_LDIST1]], 2
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71 ; CHECK-NEXT: [[MUL_EXT_LDIST1:%.*]] = zext i32 [[MUL_LDIST1]] to i64
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72 ; CHECK-NEXT: [[ARRAYIDXA_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[MUL_EXT_LDIST1]]
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73 ; CHECK-NEXT: [[LOADA_LDIST1:%.*]] = load i32, i32* [[ARRAYIDXA_LDIST1]], align 4
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74 ; CHECK-NEXT: [[ARRAYIDXB_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[MUL_EXT_LDIST1]]
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75 ; CHECK-NEXT: [[LOADB_LDIST1:%.*]] = load i32, i32* [[ARRAYIDXB_LDIST1]], align 4
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76 ; CHECK-NEXT: [[MULA_LDIST1:%.*]] = mul i32 [[LOADB_LDIST1]], [[LOADA_LDIST1]]
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77 ; CHECK-NEXT: [[ADD_LDIST1]] = add nuw nsw i64 [[IND_LDIST1]], 1
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78 ; CHECK-NEXT: [[INC1_LDIST1]] = add i32 [[IND1_LDIST1]], 1
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79 ; CHECK-NEXT: [[ARRAYIDXA_PLUS_4_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD_LDIST1]]
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80 ; CHECK-NEXT: store i32 [[MULA_LDIST1]], i32* [[ARRAYIDXA_PLUS_4_LDIST1]], align 4
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81 ; CHECK-NEXT: [[EXITCOND_LDIST1:%.*]] = icmp eq i64 [[ADD_LDIST1]], [[N]]
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82 ; CHECK-NEXT: br i1 [[EXITCOND_LDIST1]], label [[FOR_BODY_PH:%.*]], label [[FOR_BODY_LDIST1]]
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83 ; CHECK: for.body.ph:
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84 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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85 ; CHECK: for.body:
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86 ; CHECK-NEXT: [[IND:%.*]] = phi i64 [ 0, [[FOR_BODY_PH]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
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87 ; CHECK-NEXT: [[IND1:%.*]] = phi i32 [ 0, [[FOR_BODY_PH]] ], [ [[INC1:%.*]], [[FOR_BODY]] ]
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88 ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IND1]], 2
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89 ; CHECK-NEXT: [[MUL_EXT:%.*]] = zext i32 [[MUL]] to i64
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90 ; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[IND]], 1
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91 ; CHECK-NEXT: [[INC1]] = add i32 [[IND1]], 1
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92 ; CHECK-NEXT: [[ARRAYIDXD:%.*]] = getelementptr inbounds i32, i32* [[D]], i64 [[MUL_EXT]]
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93 ; CHECK-NEXT: [[LOADD:%.*]] = load i32, i32* [[ARRAYIDXD]], align 4
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94 ; CHECK-NEXT: [[ARRAYIDXE:%.*]] = getelementptr inbounds i32, i32* [[E]], i64 [[MUL_EXT]]
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95 ; CHECK-NEXT: [[LOADE:%.*]] = load i32, i32* [[ARRAYIDXE]], align 4
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96 ; CHECK-NEXT: [[MULC:%.*]] = mul i32 [[LOADD]], [[LOADE]]
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97 ; CHECK-NEXT: [[ARRAYIDXC:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 [[MUL_EXT]]
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98 ; CHECK-NEXT: store i32 [[MULC]], i32* [[ARRAYIDXC]], align 4
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99 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[ADD]], [[N]]
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100 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]]
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101 ; CHECK: for.end:
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102 ; CHECK-NEXT: ret void
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103 ;
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104 entry:
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105 br label %for.body
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106
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107 for.body: ; preds = %for.body, %entry
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108 %ind = phi i64 [ 0, %entry ], [ %add, %for.body ]
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109 %ind1 = phi i32 [ 0, %entry ], [ %inc1, %for.body ]
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110
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111 %mul = mul i32 %ind1, 2
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112 %mul_ext = zext i32 %mul to i64
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113
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114
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115 %arrayidxA = getelementptr inbounds i32, i32* %a, i64 %mul_ext
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116 %loadA = load i32, i32* %arrayidxA, align 4
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117
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118 %arrayidxB = getelementptr inbounds i32, i32* %b, i64 %mul_ext
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119 %loadB = load i32, i32* %arrayidxB, align 4
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120
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121 %mulA = mul i32 %loadB, %loadA
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122
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123 %add = add nuw nsw i64 %ind, 1
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124 %inc1 = add i32 %ind1, 1
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125
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126 %arrayidxA_plus_4 = getelementptr inbounds i32, i32* %a, i64 %add
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127 store i32 %mulA, i32* %arrayidxA_plus_4, align 4
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128
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129 %arrayidxD = getelementptr inbounds i32, i32* %d, i64 %mul_ext
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130 %loadD = load i32, i32* %arrayidxD, align 4
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131
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132 %arrayidxE = getelementptr inbounds i32, i32* %e, i64 %mul_ext
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133 %loadE = load i32, i32* %arrayidxE, align 4
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134
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135 %mulC = mul i32 %loadD, %loadE
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136
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137 %arrayidxC = getelementptr inbounds i32, i32* %c, i64 %mul_ext
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138 store i32 %mulC, i32* %arrayidxC, align 4
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139
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140 %exitcond = icmp eq i64 %add, %N
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141 br i1 %exitcond, label %for.end, label %for.body
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142
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143 for.end: ; preds = %for.body
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144 ret void
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145 }
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146
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147 ; Can't add control dependency with convergent in loop body.
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148 define void @f_with_convergent(i32* noalias %a, i32* noalias %b, i32* noalias %c, i32* noalias %d, i32* noalias %e, i64 %N) #1 {
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149 ; CHECK-LABEL: @f_with_convergent(
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150 ; CHECK-NEXT: entry:
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151 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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152 ; CHECK: for.body:
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153 ; CHECK-NEXT: [[IND:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
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154 ; CHECK-NEXT: [[IND1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC1:%.*]], [[FOR_BODY]] ]
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155 ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IND1]], 2
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156 ; CHECK-NEXT: [[MUL_EXT:%.*]] = zext i32 [[MUL]] to i64
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157 ; CHECK-NEXT: [[ARRAYIDXA:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[MUL_EXT]]
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158 ; CHECK-NEXT: [[LOADA:%.*]] = load i32, i32* [[ARRAYIDXA]], align 4
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159 ; CHECK-NEXT: [[ARRAYIDXB:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[MUL_EXT]]
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160 ; CHECK-NEXT: [[LOADB:%.*]] = load i32, i32* [[ARRAYIDXB]], align 4
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161 ; CHECK-NEXT: [[MULA:%.*]] = mul i32 [[LOADB]], [[LOADA]]
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162 ; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[IND]], 1
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163 ; CHECK-NEXT: [[INC1]] = add i32 [[IND1]], 1
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164 ; CHECK-NEXT: [[ARRAYIDXA_PLUS_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD]]
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165 ; CHECK-NEXT: store i32 [[MULA]], i32* [[ARRAYIDXA_PLUS_4]], align 4
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166 ; CHECK-NEXT: [[ARRAYIDXD:%.*]] = getelementptr inbounds i32, i32* [[D:%.*]], i64 [[MUL_EXT]]
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167 ; CHECK-NEXT: [[LOADD:%.*]] = load i32, i32* [[ARRAYIDXD]], align 4
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168 ; CHECK-NEXT: [[ARRAYIDXE:%.*]] = getelementptr inbounds i32, i32* [[E:%.*]], i64 [[MUL_EXT]]
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169 ; CHECK-NEXT: [[LOADE:%.*]] = load i32, i32* [[ARRAYIDXE]], align 4
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170 ; CHECK-NEXT: [[CONVERGENTD:%.*]] = call i32 @llvm.convergent(i32 [[LOADD]])
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171 ; CHECK-NEXT: [[MULC:%.*]] = mul i32 [[CONVERGENTD]], [[LOADE]]
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172 ; CHECK-NEXT: [[ARRAYIDXC:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[MUL_EXT]]
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173 ; CHECK-NEXT: store i32 [[MULC]], i32* [[ARRAYIDXC]], align 4
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174 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[ADD]], [[N:%.*]]
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175 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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176 ; CHECK: for.end:
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177 ; CHECK-NEXT: ret void
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178 ;
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179 entry:
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180 br label %for.body
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181
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182 for.body: ; preds = %for.body, %entry
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183 %ind = phi i64 [ 0, %entry ], [ %add, %for.body ]
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184 %ind1 = phi i32 [ 0, %entry ], [ %inc1, %for.body ]
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185
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186 %mul = mul i32 %ind1, 2
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187 %mul_ext = zext i32 %mul to i64
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188
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189
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190 %arrayidxA = getelementptr inbounds i32, i32* %a, i64 %mul_ext
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191 %loadA = load i32, i32* %arrayidxA, align 4
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192
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193 %arrayidxB = getelementptr inbounds i32, i32* %b, i64 %mul_ext
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194 %loadB = load i32, i32* %arrayidxB, align 4
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195
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196 %mulA = mul i32 %loadB, %loadA
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197
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198 %add = add nuw nsw i64 %ind, 1
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199 %inc1 = add i32 %ind1, 1
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200
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201 %arrayidxA_plus_4 = getelementptr inbounds i32, i32* %a, i64 %add
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202 store i32 %mulA, i32* %arrayidxA_plus_4, align 4
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203
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204 %arrayidxD = getelementptr inbounds i32, i32* %d, i64 %mul_ext
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205 %loadD = load i32, i32* %arrayidxD, align 4
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206
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207 %arrayidxE = getelementptr inbounds i32, i32* %e, i64 %mul_ext
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208 %loadE = load i32, i32* %arrayidxE, align 4
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209
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210 %convergentD = call i32 @llvm.convergent(i32 %loadD)
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211 %mulC = mul i32 %convergentD, %loadE
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212
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213 %arrayidxC = getelementptr inbounds i32, i32* %c, i64 %mul_ext
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214 store i32 %mulC, i32* %arrayidxC, align 4
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215
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216 %exitcond = icmp eq i64 %add, %N
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217 br i1 %exitcond, label %for.end, label %for.body
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218
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219 for.end: ; preds = %for.body
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220 ret void
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221 }
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222
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223 declare i32 @llvm.convergent(i32) #0
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224
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225 attributes #0 = { nounwind readnone convergent }
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226 attributes #1 = { nounwind convergent }
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