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annotate clang/test/CodeGen/arm-cde-reinterpret.c @ 207:2e18cbf3894f

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LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 0572611fdcc8
children c4bab56944e8
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1 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi \
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2 // RUN: -target-feature +cdecp0 -target-feature +mve.fp \
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3 // RUN: -mfloat-abi hard -O0 -disable-O0-optnone \
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4 // RUN: -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-LE
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5 // RUN: %clang_cc1 -triple thumbebv8.1m.main-arm-none-eabi \
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6 // RUN: -target-feature +cdecp0 -target-feature +mve.fp \
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7 // RUN: -mfloat-abi hard -O0 -disable-O0-optnone \
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8 // RUN: -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-BE
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9
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10 #include <arm_cde.h>
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11
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12 // CHECK-LABEL: @test_s8(
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13 // CHECK-NEXT: entry:
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14 // CHECK-NEXT: ret <16 x i8> [[X:%.*]]
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15 //
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16 int8x16_t test_s8(uint8x16_t x) {
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17 return __arm_vreinterpretq_s8_u8(x);
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18 }
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19
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20 // CHECK-LABEL: @test_u16(
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21 // CHECK-NEXT: entry:
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22 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <8 x i16>
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23 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v16i8(<16 x i8> [[X:%.*]])
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24 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
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25 //
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26 uint16x8_t test_u16(uint8x16_t x) {
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27 return __arm_vreinterpretq_u16_u8(x);
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28 }
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29
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30 // CHECK-LABEL: @test_s32(
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31 // CHECK-NEXT: entry:
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32 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x i32>
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33 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v16i8(<16 x i8> [[X:%.*]])
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34 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
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35 //
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36 int32x4_t test_s32(uint8x16_t x) {
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37 return __arm_vreinterpretq_s32_u8(x);
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38 }
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39
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40 // CHECK-LABEL: @test_u32(
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41 // CHECK-NEXT: entry:
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42 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x i32>
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43 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v16i8(<16 x i8> [[X:%.*]])
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44 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
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45 //
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46 uint32x4_t test_u32(uint8x16_t x) {
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47 return __arm_vreinterpretq_u32_u8(x);
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48 }
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49
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50 // CHECK-LABEL: @test_s64(
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51 // CHECK-NEXT: entry:
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52 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <2 x i64>
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53 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vreinterpretq.v2i64.v16i8(<16 x i8> [[X:%.*]])
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54 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
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55 //
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56 int64x2_t test_s64(uint8x16_t x) {
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57 return __arm_vreinterpretq_s64_u8(x);
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58 }
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59
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60 // CHECK-LABEL: @test_u64(
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61 // CHECK-NEXT: entry:
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62 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <2 x i64>
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63 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vreinterpretq.v2i64.v16i8(<16 x i8> [[X:%.*]])
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64 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
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65 //
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66 uint64x2_t test_u64(uint8x16_t x) {
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67 return __arm_vreinterpretq_u64_u8(x);
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68 }
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69
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70 // CHECK-LABEL: @test_f16(
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71 // CHECK-NEXT: entry:
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72 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <8 x half>
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73 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vreinterpretq.v8f16.v16i8(<16 x i8> [[X:%.*]])
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74 // CHECK-NEXT: ret <8 x half> [[TMP0]]
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75 //
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76 float16x8_t test_f16(uint8x16_t x) {
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77 return __arm_vreinterpretq_f16_u8(x);
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78 }
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79
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80 // CHECK-LABEL: @test_f32(
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81 // CHECK-NEXT: entry:
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82 // CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x float>
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83 // CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vreinterpretq.v4f32.v16i8(<16 x i8> [[X:%.*]])
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84 // CHECK-NEXT: ret <4 x float> [[TMP0]]
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85 //
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86 float32x4_t test_f32(uint8x16_t x) {
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87 return __arm_vreinterpretq_f32_u8(x);
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88 }