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150
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1 // RUN: %clang_cc1 < %s -triple armv5e-none-linux-gnueabi -emit-llvm -O1 | FileCheck %s
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2
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3 // FIXME: This file should not be checking -O1 output.
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4 // Ie, it is testing many IR optimizer passes as part of front-end verification.
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5
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6 enum memory_order {
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7 memory_order_relaxed, memory_order_consume, memory_order_acquire,
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8 memory_order_release, memory_order_acq_rel, memory_order_seq_cst
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9 };
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10
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11 int *test_c11_atomic_fetch_add_int_ptr(_Atomic(int *) *p) {
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12 // CHECK: test_c11_atomic_fetch_add_int_ptr
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13 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5)
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14 return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst);
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15 }
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16
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17 int *test_c11_atomic_fetch_sub_int_ptr(_Atomic(int *) *p) {
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18 // CHECK: test_c11_atomic_fetch_sub_int_ptr
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19 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5)
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20 return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst);
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21 }
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22
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23 int test_c11_atomic_fetch_add_int(_Atomic(int) *p) {
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24 // CHECK: test_c11_atomic_fetch_add_int
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25 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5)
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26 return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst);
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27 }
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28
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29 int test_c11_atomic_fetch_sub_int(_Atomic(int) *p) {
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30 // CHECK: test_c11_atomic_fetch_sub_int
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31 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5)
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32 return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst);
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33 }
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34
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35 int *fp2a(int **p) {
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36 // CHECK: @fp2a
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37 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0)
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38 // Note, the GNU builtins do not multiply by sizeof(T)!
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39 return __atomic_fetch_sub(p, 4, memory_order_relaxed);
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40 }
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41
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42 int test_atomic_fetch_add(int *p) {
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43 // CHECK: test_atomic_fetch_add
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44 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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45 return __atomic_fetch_add(p, 55, memory_order_seq_cst);
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46 }
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47
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48 int test_atomic_fetch_sub(int *p) {
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49 // CHECK: test_atomic_fetch_sub
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50 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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51 return __atomic_fetch_sub(p, 55, memory_order_seq_cst);
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52 }
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53
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54 int test_atomic_fetch_and(int *p) {
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55 // CHECK: test_atomic_fetch_and
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56 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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57 return __atomic_fetch_and(p, 55, memory_order_seq_cst);
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58 }
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59
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60 int test_atomic_fetch_or(int *p) {
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61 // CHECK: test_atomic_fetch_or
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62 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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63 return __atomic_fetch_or(p, 55, memory_order_seq_cst);
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64 }
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65
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66 int test_atomic_fetch_xor(int *p) {
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67 // CHECK: test_atomic_fetch_xor
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68 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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69 return __atomic_fetch_xor(p, 55, memory_order_seq_cst);
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70 }
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71
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72 int test_atomic_fetch_nand(int *p) {
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73 // CHECK: test_atomic_fetch_nand
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74 // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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75 return __atomic_fetch_nand(p, 55, memory_order_seq_cst);
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76 }
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77
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78 int test_atomic_add_fetch(int *p) {
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79 // CHECK: test_atomic_add_fetch
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80 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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81 // CHECK: {{%[^ ]*}} = add i32 [[CALL]], 55
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82 return __atomic_add_fetch(p, 55, memory_order_seq_cst);
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83 }
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84
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85 int test_atomic_sub_fetch(int *p) {
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86 // CHECK: test_atomic_sub_fetch
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87 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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88 // CHECK: {{%[^ ]*}} = add i32 [[CALL]], -55
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89 return __atomic_sub_fetch(p, 55, memory_order_seq_cst);
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90 }
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91
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92 int test_atomic_and_fetch(int *p) {
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93 // CHECK: test_atomic_and_fetch
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94 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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95 // CHECK: {{%[^ ]*}} = and i32 [[CALL]], 55
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96 return __atomic_and_fetch(p, 55, memory_order_seq_cst);
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97 }
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98
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99 int test_atomic_or_fetch(int *p) {
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100 // CHECK: test_atomic_or_fetch
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101 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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102 // CHECK: {{%[^ ]*}} = or i32 [[CALL]], 55
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103 return __atomic_or_fetch(p, 55, memory_order_seq_cst);
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104 }
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105
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106 int test_atomic_xor_fetch(int *p) {
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107 // CHECK: test_atomic_xor_fetch
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108 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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109 // CHECK: {{%[^ ]*}} = xor i32 [[CALL]], 55
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110 return __atomic_xor_fetch(p, 55, memory_order_seq_cst);
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111 }
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112
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113 int test_atomic_nand_fetch(int *p) {
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114 // CHECK: test_atomic_nand_fetch
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115 // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)
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116 // FIXME: We should not be checking optimized IR. It changes independently of clang.
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117 // FIXME-CHECK: [[AND:%[^ ]*]] = and i32 [[CALL]], 55
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118 // FIXME-CHECK: {{%[^ ]*}} = xor i32 [[AND]], -1
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119 return __atomic_nand_fetch(p, 55, memory_order_seq_cst);
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120 }
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