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annotate clang/test/CodeGen/ppc-varargs-struct.c @ 207:2e18cbf3894f

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LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 1d019706d866
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 // REQUIRES: powerpc-registered-target
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2 // REQUIRES: asserts
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3 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
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4 // RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-PPC
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5
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6 #include <stdarg.h>
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7
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8 struct x {
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9 long a;
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10 double b;
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11 };
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12
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13 void testva (int n, ...)
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14 {
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15 va_list ap;
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16
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17 struct x t = va_arg (ap, struct x);
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18 // CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x*
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19 // CHECK: bitcast %struct.x* %t to i8*
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20 // CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
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21 // CHECK: call void @llvm.memcpy
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22
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23 // CHECK-PPC: [[ARRAYDECAY:%.+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
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24 // CHECK-PPC-NEXT: [[GPRPTR:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 0
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25 // CHECK-PPC-NEXT: [[GPR:%.+]] = load i8, i8* [[GPRPTR]], align 4
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26 // CHECK-PPC-NEXT: [[COND:%.+]] = icmp ult i8 [[GPR]], 8
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27 // CHECK-PPC-NEXT: br i1 [[COND]], label %[[USING_REGS:[a-z_0-9]+]], label %[[USING_OVERFLOW:[a-z_0-9]+]]
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28 //
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29 // CHECK-PPC:[[USING_REGS]]
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30 // CHECK-PPC-NEXT: [[REGSAVE_AREA_P:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 4
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31 // CHECK-PPC-NEXT: [[REGSAVE_AREA:%.+]] = load i8*, i8** [[REGSAVE_AREA_P]], align 4
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32 // CHECK-PPC-NEXT: [[OFFSET:%.+]] = mul i8 [[GPR]], 4
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33 // CHECK-PPC-NEXT: [[RAW_REGADDR:%.+]] = getelementptr inbounds i8, i8* [[REGSAVE_AREA]], i8 [[OFFSET]]
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34 // CHECK-PPC-NEXT: [[REGADDR:%.+]] = bitcast i8* [[RAW_REGADDR]] to %struct.x**
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35 // CHECK-PPC-NEXT: [[USED_GPR:%[0-9]+]] = add i8 [[GPR]], 1
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36 // CHECK-PPC-NEXT: store i8 [[USED_GPR]], i8* [[GPRPTR]], align 4
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37 // CHECK-PPC-NEXT: br label %[[CONT:[a-z0-9]+]]
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38 //
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39 // CHECK-PPC:[[USING_OVERFLOW]]
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40 // CHECK-PPC-NEXT: store i8 8, i8* [[GPRPTR]], align 4
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41 // CHECK-PPC-NEXT: [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
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42 // CHECK-PPC-NEXT: [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
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43 // CHECK-PPC-NEXT: %{{[0-9]+}} = ptrtoint i8* %argp.cur to i32
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44 // CHECK-PPC-NEXT: %{{[0-9]+}} = add i32 %{{[0-9]+}}, 7
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45 // CHECK-PPC-NEXT: %{{[0-9]+}} = and i32 %{{[0-9]+}}, -8
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46 // CHECK-PPC-NEXT: %argp.cur.aligned = inttoptr i32 %{{[0-9]+}} to i8*
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47 // CHECK-PPC-NEXT: [[MEMADDR:%.+]] = bitcast i8* %argp.cur.aligned to %struct.x**
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48 // CHECK-PPC-NEXT: [[NEW_OVERFLOW_AREA:%[0-9]+]] = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 4
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49 // CHECK-PPC-NEXT: store i8* [[NEW_OVERFLOW_AREA:%[0-9]+]], i8** [[OVERFLOW_AREA_P]], align 4
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50 // CHECK-PPC-NEXT: br label %[[CONT]]
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51 //
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52 // CHECK-PPC:[[CONT]]
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53 // CHECK-PPC-NEXT: [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x** [ [[REGADDR]], %[[USING_REGS]] ], [ [[MEMADDR]], %[[USING_OVERFLOW]] ]
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54 // CHECK-PPC-NEXT: [[AGGR:%[a-z0-9]+]] = load %struct.x*, %struct.x** [[VAARG_ADDR]]
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55 // CHECK-PPC-NEXT: [[DEST:%[0-9]+]] = bitcast %struct.x* %t to i8*
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56 // CHECK-PPC-NEXT: [[SRC:%.+]] = bitcast %struct.x* [[AGGR]] to i8*
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57 // CHECK-PPC-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 [[DEST]], i8* align 8 [[SRC]], i32 16, i1 false)
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58
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59 int v = va_arg (ap, int);
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60
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61 // CHECK: getelementptr inbounds i8, i8* %{{[a-z.0-9]*}}, i64 4
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62 // CHECK: bitcast i8* %{{[0-9]+}} to i32*
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63 // CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
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64 // CHECK-PPC-NEXT: [[GPRPTR:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 0
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65 // CHECK-PPC-NEXT: [[GPR:%.+]] = load i8, i8* [[GPRPTR]], align 4
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66 // CHECK-PPC-NEXT: [[COND:%.+]] = icmp ult i8 [[GPR]], 8
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67 // CHECK-PPC-NEXT: br i1 [[COND]], label %[[USING_REGS:.+]], label %[[USING_OVERFLOW:.+]]{{$}}
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68 //
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69 // CHECK-PPC:[[USING_REGS]]
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70 // CHECK-PPC-NEXT: [[REGSAVE_AREA_P:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 4
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71 // CHECK-PPC-NEXT: [[REGSAVE_AREA:%.+]] = load i8*, i8** [[REGSAVE_AREA_P]], align 4
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72 // CHECK-PPC-NEXT: [[OFFSET:%.+]] = mul i8 [[GPR]], 4
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73 // CHECK-PPC-NEXT: [[RAW_REGADDR:%.+]] = getelementptr inbounds i8, i8* [[REGSAVE_AREA]], i8 [[OFFSET]]
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74 // CHECK-PPC-NEXT: [[REGADDR:%.+]] = bitcast i8* [[RAW_REGADDR]] to i32*
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75 // CHECK-PPC-NEXT: [[USED_GPR:%[0-9]+]] = add i8 [[GPR]], 1
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76 // CHECK-PPC-NEXT: store i8 [[USED_GPR]], i8* [[GPRPTR]], align 4
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77 // CHECK-PPC-NEXT: br label %[[CONT:[a-z0-9]+]]
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78 //
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79 // CHECK-PPC:[[USING_OVERFLOW]]
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80 // CHECK-PPC-NEXT: store i8 8, i8* [[GPRPTR]], align 4
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81 // CHECK-PPC-NEXT: [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
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82 // CHECK-PPC-NEXT: [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
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83 // CHECK-PPC-NEXT: [[MEMADDR:%.+]] = bitcast i8* [[OVERFLOW_AREA]] to i32*
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84 // CHECK-PPC-NEXT: [[NEW_OVERFLOW_AREA:%[0-9]+]] = getelementptr inbounds i8, i8* [[OVERFLOW_AREA]], i32 4
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85 // CHECK-PPC-NEXT: store i8* [[NEW_OVERFLOW_AREA]], i8** [[OVERFLOW_AREA_P]]
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86 // CHECK-PPC-NEXT: br label %[[CONT]]
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87 //
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88 // CHECK-PPC:[[CONT]]
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89 // CHECK-PPC-NEXT: [[VAARG_ADDR:%[a-z.0-9]+]] = phi i32* [ [[REGADDR]], %[[USING_REGS]] ], [ [[MEMADDR]], %[[USING_OVERFLOW]] ]
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90 // CHECK-PPC-NEXT: [[THIRTYFIVE:%[0-9]+]] = load i32, i32* [[VAARG_ADDR]]
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91 // CHECK-PPC-NEXT: store i32 [[THIRTYFIVE]], i32* %v, align 4
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92
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93 #ifdef __powerpc64__
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94 __int128_t u = va_arg (ap, __int128_t);
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95 #endif
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96 // CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128*
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97 // CHECK-NEXT: load i128, i128* %{{[0-9]+}}
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98 }