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150
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1 // RUN: llvm-tblgen %s | FileCheck %s
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2 // XFAIL: vg_leak
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3
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4 class ValueType<int size, int value> {
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5 int Size = size;
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6 int Value = value;
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7 }
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8
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9 def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
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10 def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
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11
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12 class Intrinsic<string name> {
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13 string Name = name;
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14 }
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15
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16 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
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17 dag PatternToMatch = patternToMatch;
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18 list<dag> ResultInstrs = resultInstrs;
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19 }
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20
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21 // Pat - A simple (but common) form of a pattern, which produces a simple result
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22 // not needing a full list.
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23 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
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24
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25 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
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26 list<dag> pattern> {
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27 bits<8> Opcode = opcode;
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28 dag OutOperands = oopnds;
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29 dag InOperands = iopnds;
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30 string AssemblyString = asmstr;
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31 list<dag> Pattern = pattern;
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32 }
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33
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34 def ops;
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35 def outs;
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36 def ins;
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37
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38 def set;
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39
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40 // Define registers
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41 class Register<string n> {
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42 string Name = n;
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43 }
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44
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45 class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
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46 list<ValueType> RegTypes = regTypes;
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47 list<Register> MemberList = regList;
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48 }
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49
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50 def XMM0: Register<"xmm0">;
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51 def XMM1: Register<"xmm1">;
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52 def XMM2: Register<"xmm2">;
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53 def XMM3: Register<"xmm3">;
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54 def XMM4: Register<"xmm4">;
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55 def XMM5: Register<"xmm5">;
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56 def XMM6: Register<"xmm6">;
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57 def XMM7: Register<"xmm7">;
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58 def XMM8: Register<"xmm8">;
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59 def XMM9: Register<"xmm9">;
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60 def XMM10: Register<"xmm10">;
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61 def XMM11: Register<"xmm11">;
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62 def XMM12: Register<"xmm12">;
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63 def XMM13: Register<"xmm13">;
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64 def XMM14: Register<"xmm14">;
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65 def XMM15: Register<"xmm15">;
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66
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67 def VR128 : RegisterClass<[v2i64, v2f64],
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68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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69 XMM8, XMM9, XMM10, XMM11,
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70 XMM12, XMM13, XMM14, XMM15]>;
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71
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72 // Dummy for subst
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73 def REGCLASS : RegisterClass<[], []>;
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74 def MNEMONIC;
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75
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76 // Define intrinsics
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77 def int_x86_sse2_add_ps : Intrinsic<"addps">;
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78 def int_x86_sse2_add_pd : Intrinsic<"addpd">;
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79 def INTRINSIC : Intrinsic<"Dummy">;
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80 def bitconvert;
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81
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82 class MakePat<list<dag> patterns> : Pat<patterns[0], patterns[1]>;
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83
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84 class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr,
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85 list<list<dag>> patterns>
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86 : Inst<opcode, opnds, iopnds, asmstr,
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87 !foreach(pattern, patterns[0],
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88 !foreach(operand, pattern,
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89 !subst(INTRINSIC, intr,
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90 !subst(REGCLASS, VR128,
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91 !subst(MNEMONIC, set, operand)))))>,
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92 MakePat<!foreach(pattern, patterns[1],
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93 !foreach(operand, pattern,
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94 !subst(INTRINSIC, intr,
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95 !subst(REGCLASS, VR128,
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96 !subst(MNEMONIC, set, operand)))))>;
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97
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98 multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> {
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99 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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100 !strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_ps", intr)), patterns>;
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101
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102 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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103 !strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)), patterns>;
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104 }
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105
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106 defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
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107 // rr Patterns
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108 [[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))],
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109 [(set REGCLASS:$dst, (bitconvert (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))),
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110 (MNEMONIC REGCLASS:$dst, REGCLASS:$src)]]>;
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111
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112 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
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113 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
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