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150
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1 // RUN: llvm-tblgen %s | FileCheck %s
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2 // XFAIL: vg_leak
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3
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4 // CHECK: add_ps
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5 // CHECK: add_ps
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6 // CHECK: add_ps
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7 // CHECK-NOT: add_ps
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8
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9 class ValueType<int size, int value> {
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10 int Size = size;
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11 int Value = value;
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12 }
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13
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14 def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
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15 def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
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16
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17 class Intrinsic<string name> {
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18 string Name = name;
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19 }
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20
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21 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
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22 list<dag> pattern> {
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23 bits<8> Opcode = opcode;
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24 dag OutOperands = oopnds;
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25 dag InOperands = iopnds;
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26 string AssemblyString = asmstr;
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27 list<dag> Pattern = pattern;
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28 }
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29
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30 def ops;
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31 def outs;
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32 def ins;
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33
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34 def set;
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35
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36 // Define registers
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37 class Register<string n> {
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38 string Name = n;
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39 }
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40
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41 class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
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42 list<ValueType> RegTypes = regTypes;
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43 list<Register> MemberList = regList;
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44 }
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45
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46 def XMM0: Register<"xmm0">;
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47 def XMM1: Register<"xmm1">;
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48 def XMM2: Register<"xmm2">;
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49 def XMM3: Register<"xmm3">;
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50 def XMM4: Register<"xmm4">;
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51 def XMM5: Register<"xmm5">;
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52 def XMM6: Register<"xmm6">;
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53 def XMM7: Register<"xmm7">;
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54 def XMM8: Register<"xmm8">;
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55 def XMM9: Register<"xmm9">;
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56 def XMM10: Register<"xmm10">;
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57 def XMM11: Register<"xmm11">;
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58 def XMM12: Register<"xmm12">;
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59 def XMM13: Register<"xmm13">;
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60 def XMM14: Register<"xmm14">;
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61 def XMM15: Register<"xmm15">;
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62
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63 def VR128 : RegisterClass<[v2i64, v2f64],
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64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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65 XMM8, XMM9, XMM10, XMM11,
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66 XMM12, XMM13, XMM14, XMM15]>;
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67
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68 // Define intrinsics
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69 def int_x86_sse2_add_ps : Intrinsic<"addps">;
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70 def int_x86_sse2_add_pd : Intrinsic<"addpd">;
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71
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72 multiclass arith<bits<8> opcode, string asmstr, string Intr> {
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73 def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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74 !strconcat(asmstr, "\t$dst, $src1, $src2"),
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75 [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
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76
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77 def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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78 !strconcat(asmstr, "\t$dst, $src1, $src2"),
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79 [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
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80 }
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81
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82 defm ADD : arith<0x58, "add", "int_x86_sse2_add">;
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83
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84 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
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85 Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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86 !strconcat(asmstr, "\t$dst, $src1, $src2"),
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87 [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
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88
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89
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90 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
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91 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
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92
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93 def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
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94 }
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95
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96 defm ADD : arith_int<0x58, "add", "int_x86_sse2_add">;
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