annotate lib/Target/Nios2/Nios2TargetMachine.cpp @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1
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date Sat, 17 Feb 2018 09:57:20 +0900
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1 //===-- Nios2TargetMachine.cpp - Define TargetMachine for Nios2 -----------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // Implements the info about Nios2 target spec.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "Nios2TargetMachine.h"
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15 #include "Nios2.h"
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16 #include "Nios2TargetObjectFile.h"
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17
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18 #include "llvm/CodeGen/TargetPassConfig.h"
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19 #include "llvm/Support/TargetRegistry.h"
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20
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21 using namespace llvm;
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22
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23 #define DEBUG_TYPE "nios2"
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24
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25 extern "C" void LLVMInitializeNios2Target() {
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26 // Register the target.
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27 RegisterTargetMachine<Nios2TargetMachine> X(getTheNios2Target());
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28 }
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29
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30 static std::string computeDataLayout() {
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31 return "e-p:32:32:32-i8:8:32-i16:16:32-n32";
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32 }
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33
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34 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
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35 if (!RM.hasValue())
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36 return Reloc::Static;
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37 return *RM;
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38 }
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39
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40 static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
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41 Reloc::Model RM, bool JIT) {
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42 if (CM)
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43 return *CM;
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44 return CodeModel::Small;
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45 }
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46
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47 Nios2TargetMachine::Nios2TargetMachine(const Target &T, const Triple &TT,
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48 StringRef CPU, StringRef FS,
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49 const TargetOptions &Options,
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50 Optional<Reloc::Model> RM,
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51 Optional<CodeModel::Model> CM,
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52 CodeGenOpt::Level OL, bool JIT)
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53 : LLVMTargetMachine(
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54 T, computeDataLayout(), TT, CPU, FS, Options,
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55 getEffectiveRelocModel(RM),
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56 getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL),
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57 TLOF(make_unique<Nios2TargetObjectFile>()),
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58 Subtarget(TT, CPU, FS, *this) {
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59 initAsmInfo();
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60 }
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61
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62 Nios2TargetMachine::~Nios2TargetMachine() {}
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63
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64 const Nios2Subtarget *
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65 Nios2TargetMachine::getSubtargetImpl(const Function &F) const {
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66 Attribute CPUAttr = F.getFnAttribute("target-cpu");
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67 Attribute FSAttr = F.getFnAttribute("target-features");
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68
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69 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
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70 ? CPUAttr.getValueAsString().str()
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71 : TargetCPU;
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72 std::string FS = !FSAttr.hasAttribute(Attribute::None)
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73 ? FSAttr.getValueAsString().str()
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74 : TargetFS;
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75
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76 auto &I = SubtargetMap[CPU + FS];
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77 if (!I) {
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78 // This needs to be done before we create a new subtarget since any
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79 // creation will depend on the TM and the code generation flags on the
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80 // function that reside in TargetOptions.
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81 resetTargetOptions(F);
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82 I = llvm::make_unique<Nios2Subtarget>(TargetTriple, CPU, FS, *this);
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83 }
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84 return I.get();
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85 }
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86
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87 namespace {
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88 /// Nios2 Code Generator Pass Configuration Options.
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89 class Nios2PassConfig : public TargetPassConfig {
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90 public:
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91 Nios2PassConfig(Nios2TargetMachine &TM, PassManagerBase *PM)
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92 : TargetPassConfig(TM, *PM) {}
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93
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94 Nios2TargetMachine &getNios2TargetMachine() const {
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95 return getTM<Nios2TargetMachine>();
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96 }
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97
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98 void addCodeGenPrepare() override;
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99 bool addInstSelector() override;
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100 void addIRPasses() override;
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101 };
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102 } // namespace
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103
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104 TargetPassConfig *Nios2TargetMachine::createPassConfig(PassManagerBase &PM) {
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105 return new Nios2PassConfig(*this, &PM);
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106 }
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107
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108 void Nios2PassConfig::addCodeGenPrepare() {
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109 TargetPassConfig::addCodeGenPrepare();
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110 }
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111
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112 void Nios2PassConfig::addIRPasses() { TargetPassConfig::addIRPasses(); }
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113
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114 // Install an instruction selector pass using
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115 // the ISelDag to gen Nios2 code.
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116 bool Nios2PassConfig::addInstSelector() {
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117 addPass(createNios2ISelDag(getNios2TargetMachine(), getOptLevel()));
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118 return false;
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119 }