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annotate test/CodeGen/Mips/llvm-ir/indirectbr.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; Test all important variants of the unconditional 'br' instruction.
54457678186b LLVM 3.6
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3 ; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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4 ; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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5 ; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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6 ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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7 ; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6C
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8 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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9 ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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10 ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
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13 ; RUN: llc -march=mips64 -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 define i32 @br(i8 *%addr) {
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16 ; ALL-LABEL: br:
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17 ; NOT-R6: jr $4 # <MCInst #{{[0-9]+}} JR
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18 ; R6C: jrc $4 # <MCInst #{{[0-9]+}} JIC
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21 ; ALL: {{\$|\.L}}BB0_1: # %L1
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22 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
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23 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
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24 ; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR
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25 ; ALL: addiu $2, $zero, 0
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27 ; ALL: {{\$|\.L}}BB0_2: # %L2
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28 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
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29 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
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30 ; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR
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31 ; ALL: addiu $2, $zero, 1
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33 entry:
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34 indirectbr i8* %addr, [label %L1, label %L2]
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35
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36 L1:
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37 ret i32 0
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38
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39 L2:
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40 ret i32 1
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41 }