Mercurial > hg > CbC > CbC_llvm

annotate test/CodeGen/Thumb/ldm-stm-postinc.ll @ 134:3a76565eade5 LLVM5.0.1

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
120
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
1 ; RUN: llc -mtriple=thumbv7 -mcpu=cortex-m0 < %s -disable-lsr | FileCheck %s
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
2 ; FIXME: LSR mangles the last two testcases pretty badly. When this is fixed, remove
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
3 ; the -disable-lsr above.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
5 ; CHECK-LABEL: @f
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
6 ; CHECK: ldm {{r[0-9]}}!, {r{{[0-9]}}}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
7 define i32 @f(i32* readonly %a, i32* readnone %b) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
8 %1 = icmp eq i32* %a, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
9 br i1 %1, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
10
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
11 .lr.ph: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
12 %i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
13 %.01 = phi i32* [ %4, %.lr.ph ], [ %a, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
14 %2 = load i32, i32* %.01, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
15 %3 = add nsw i32 %2, %i.02
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
16 %4 = getelementptr inbounds i32, i32* %.01, i32 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
17 %5 = icmp eq i32* %4, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
18 br i1 %5, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
19
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
20 ._crit_edge: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
21 %i.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
22 ret i32 %i.0.lcssa
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
23 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
24
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
25 ; CHECK-LABEL: @g
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
26 ; CHECK-NOT: ldm
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
27 define i32 @g(i32* readonly %a, i32* readnone %b) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
28 %1 = icmp eq i32* %a, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
29 br i1 %1, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
30
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
31 .lr.ph: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
32 %i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
33 %.01 = phi i32* [ %4, %.lr.ph ], [ %a, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
34 %2 = load i32, i32* %.01, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
35 %3 = add nsw i32 %2, %i.02
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
36 %4 = getelementptr inbounds i32, i32* %.01, i32 2
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
37 %5 = icmp eq i32* %4, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
38 br i1 %5, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
39
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
40 ._crit_edge: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
41 %i.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
42 ret i32 %i.0.lcssa
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
43 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
44
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
45 ; CHECK-LABEL: @h
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
46 ; CHECK: stm {{r[0-9]}}!, {r{{[0-9]}}}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
47 define void @h(i32* %a, i32* readnone %b) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
48 %1 = icmp eq i32* %a, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
49 br i1 %1, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
50
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
51 .lr.ph: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
52 %i.02 = phi i32 [ %2, %.lr.ph ], [ 0, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
53 %.01 = phi i32* [ %3, %.lr.ph ], [ %a, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
54 %2 = add nsw i32 %i.02, 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
55 store i32 %i.02, i32* %.01, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
56 %3 = getelementptr inbounds i32, i32* %.01, i32 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
57 %4 = icmp eq i32* %3, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
58 br i1 %4, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
59
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
60 ._crit_edge: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
61 ret void
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
62 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
63
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
64 ; CHECK-LABEL: @j
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
65 ; CHECK-NOT: stm
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
66 define void @j(i32* %a, i32* readnone %b) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
67 %1 = icmp eq i32* %a, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
68 br i1 %1, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
69
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
70 .lr.ph: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
71 %i.02 = phi i32 [ %2, %.lr.ph ], [ 0, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
72 %.01 = phi i32* [ %3, %.lr.ph ], [ %a, %0 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
73 %2 = add nsw i32 %i.02, 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
74 store i32 %i.02, i32* %.01, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
75 %3 = getelementptr inbounds i32, i32* %.01, i32 2
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
76 %4 = icmp eq i32* %3, %b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
77 br i1 %4, label %._crit_edge, label %.lr.ph
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
78
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
79 ._crit_edge: ; preds = %.lr.ph, %0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
80 ret void
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
81 }