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134
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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2
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3 ; GCN-LABEL: {{^}}adjust_writemask_crash_0_nochain:
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4 ; GCN: image_get_lod v0, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x2
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5 ; GCN-NOT: v1
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6 ; GCN-NOT: v0
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7 ; GCN: buffer_store_dword v0
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8 define amdgpu_ps void @adjust_writemask_crash_0_nochain() #0 {
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9 main_body:
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10 %tmp = call <2 x float> @llvm.amdgcn.image.getlod.v2f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 false, i1 false, i1 false, i1 false, i1 false)
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11 %tmp1 = bitcast <2 x float> %tmp to <2 x i32>
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12 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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13 %tmp3 = bitcast <4 x i32> %tmp2 to <4 x float>
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14 %tmp4 = extractelement <4 x float> %tmp3, i32 0
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15 store volatile float %tmp4, float addrspace(1)* undef
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16 ret void
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17 }
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18
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19 ; GCN-LABEL: {{^}}adjust_writemask_crash_1_nochain:
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20 ; GCN: image_get_lod v0, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x1
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21 ; GCN-NOT: v1
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22 ; GCN-NOT: v0
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23 ; GCN: buffer_store_dword v0
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24 define amdgpu_ps void @adjust_writemask_crash_1_nochain() #0 {
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25 main_body:
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26 %tmp = call <2 x float> @llvm.amdgcn.image.getlod.v2f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 false, i1 false, i1 false, i1 false, i1 false)
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27 %tmp1 = bitcast <2 x float> %tmp to <2 x i32>
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28 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> <i32 1, i32 0, i32 undef, i32 undef>
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29 %tmp3 = bitcast <4 x i32> %tmp2 to <4 x float>
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30 %tmp4 = extractelement <4 x float> %tmp3, i32 1
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31 store volatile float %tmp4, float addrspace(1)* undef
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32 ret void
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33 }
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34
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35 ; GCN-LABEL: {{^}}adjust_writemask_crash_0_chain:
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36 ; GCN: image_sample v0, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x2
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37 ; GCN-NOT: v1
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38 ; GCN-NOT: v0
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39 ; GCN: buffer_store_dword v0
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40 define amdgpu_ps void @adjust_writemask_crash_0_chain() #0 {
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41 main_body:
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42 %tmp = call <2 x float> @llvm.amdgcn.image.sample.v2f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 false, i1 false, i1 false, i1 false, i1 false)
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43 %tmp1 = bitcast <2 x float> %tmp to <2 x i32>
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44 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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45 %tmp3 = bitcast <4 x i32> %tmp2 to <4 x float>
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46 %tmp4 = extractelement <4 x float> %tmp3, i32 0
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47 store volatile float %tmp4, float addrspace(1)* undef
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48 ret void
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49 }
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50
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51 ; GCN-LABEL: {{^}}adjust_writemask_crash_1_chain:
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52 ; GCN: image_sample v0, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x1
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53 ; GCN-NOT: v1
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54 ; GCN-NOT: v0
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55 ; GCN: buffer_store_dword v0
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56 define amdgpu_ps void @adjust_writemask_crash_1_chain() #0 {
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57 main_body:
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58 %tmp = call <2 x float> @llvm.amdgcn.image.sample.v2f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 false, i1 false, i1 false, i1 false, i1 false)
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59 %tmp1 = bitcast <2 x float> %tmp to <2 x i32>
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60 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> <i32 1, i32 0, i32 undef, i32 undef>
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61 %tmp3 = bitcast <4 x i32> %tmp2 to <4 x float>
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62 %tmp4 = extractelement <4 x float> %tmp3, i32 1
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63 store volatile float %tmp4, float addrspace(1)* undef
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64 ret void
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65 }
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66
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67 define amdgpu_ps void @adjust_writemask_crash_0_v4() #0 {
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68 main_body:
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69 %tmp = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 5, i1 false, i1 false, i1 false, i1 false, i1 false)
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70 %tmp1 = bitcast <4 x float> %tmp to <4 x i32>
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71 %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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72 %tmp3 = bitcast <4 x i32> %tmp2 to <4 x float>
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73 %tmp4 = extractelement <4 x float> %tmp3, i32 0
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74 store volatile float %tmp4, float addrspace(1)* undef
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75 ret void
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76 }
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77
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78
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79 declare <2 x float> @llvm.amdgcn.image.sample.v2f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #1
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80 declare <2 x float> @llvm.amdgcn.image.getlod.v2f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #1
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81 declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #1
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82
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83 attributes #0 = { nounwind }
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84 attributes #1 = { nounwind readonly }
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