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121
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -enable-ipra -amdgpu-sroa=0 < %s | FileCheck -check-prefix=GCN %s
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134
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -amdgpu-sroa=0 < %s | FileCheck -check-prefix=GCN %s
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121
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3
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4 ; Kernels are not called, so there is no call preserved mask.
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5 ; GCN-LABEL: {{^}}kernel:
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6 ; GCN: flat_store_dword
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7 define amdgpu_kernel void @kernel(i32 addrspace(1)* %out) #0 {
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8 entry:
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9 store i32 0, i32 addrspace(1)* %out
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10 ret void
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11 }
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12
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13 ; GCN-LABEL: {{^}}func:
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14 ; GCN: ; NumVgprs: 8
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15 define void @func() #1 {
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16 call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}"() #0
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17 ret void
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18 }
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19
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20 ; GCN-LABEL: {{^}}kernel_call:
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21 ; GCN-NOT: buffer_store
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22 ; GCN-NOT: buffer_load
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23 ; GCN-NOT: readlane
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24 ; GCN-NOT: writelane
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25 ; GCN: flat_load_dword v8
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26 ; GCN: s_swappc_b64
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27 ; GCN-NOT: buffer_store
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28 ; GCN-NOT: buffer_load
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29 ; GCN-NOT: readlane
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30 ; GCN-NOT: writelane
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31 ; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v8
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32
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33 ; GCN: ; NumSgprs: 37
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34 ; GCN: ; NumVgprs: 9
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35 define amdgpu_kernel void @kernel_call() #0 {
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36 %vgpr = load volatile i32, i32 addrspace(1)* undef
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37 tail call void @func()
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38 store volatile i32 %vgpr, i32 addrspace(1)* undef
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39 ret void
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40 }
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41
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42 ; GCN-LABEL: {{^}}func_regular_call:
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43 ; GCN-NOT: buffer_store
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44 ; GCN-NOT: buffer_load
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45 ; GCN-NOT: readlane
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46 ; GCN-NOT: writelane
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47 ; GCN: flat_load_dword v8
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48 ; GCN: s_swappc_b64
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49 ; GCN-NOT: buffer_store
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50 ; GCN-NOT: buffer_load
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51 ; GCN-NOT: readlane
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52 ; GCN-NOT: writelane
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53 ; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v8
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54
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55 ; GCN: ; NumSgprs: 32
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56 ; GCN: ; NumVgprs: 9
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57 define void @func_regular_call() #1 {
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58 %vgpr = load volatile i32, i32 addrspace(1)* undef
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59 tail call void @func()
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60 store volatile i32 %vgpr, i32 addrspace(1)* undef
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61 ret void
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62 }
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63
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64 ; GCN-LABEL: {{^}}func_tail_call:
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65 ; GCN: s_waitcnt
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66 ; GCN-NEXT: s_getpc_b64 s[6:7]
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67 ; GCN-NEXT: s_add_u32 s6,
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68 ; GCN-NEXT: s_addc_u32 s7,
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69 ; GCN-NEXT: s_setpc_b64 s[6:7]
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70
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71 ; GCN: ; NumSgprs: 32
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72 ; GCN: ; NumVgprs: 8
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73 define void @func_tail_call() #1 {
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74 tail call void @func()
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75 ret void
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76 }
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77
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78 ; GCN-LABEL: {{^}}func_call_tail_call:
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79 ; GCN: flat_load_dword v8
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80 ; GCN: s_swappc_b64
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81 ; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v8
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82 ; GCN: s_setpc_b64
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83
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84 ; GCN: ; NumSgprs: 32
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85 ; GCN: ; NumVgprs: 9
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86 define void @func_call_tail_call() #1 {
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87 %vgpr = load volatile i32, i32 addrspace(1)* undef
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88 tail call void @func()
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89 store volatile i32 %vgpr, i32 addrspace(1)* undef
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90 tail call void @func()
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91 ret void
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92 }
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93
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94 define void @void_func_void() noinline {
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95 ret void
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96 }
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97
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98 ; Make sure we don't get save/restore of FP between calls.
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99 ; GCN-LABEL: {{^}}test_funcx2:
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100 ; GCN-NOT: s5
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101 ; GCN-NOT: s32
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102 define void @test_funcx2() #0 {
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103 call void @void_func_void()
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104 call void @void_func_void()
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105 ret void
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106 }
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107
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108 attributes #0 = { nounwind }
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109 attributes #1 = { nounwind noinline }
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