annotate test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll @ 146:3fc4d5c3e21e

set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 3a76565eade5
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI %s
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
2 ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX89 -check-prefix=VI %s
134
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
3 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX89 -check-prefix=GFX9 %s
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
4
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
5 ; GCN-LABEL: {{^}}s_cvt_pkrtz_v2f16_f32:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
6 ; GCN-DAG: s_load_dword [[X:s[0-9]+]], s[0:1], 0x{{b|2c}}
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
7 ; GCN-DAG: s_load_dword [[SY:s[0-9]+]], s[0:1], 0x{{c|30}}
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
8 ; GCN: v_mov_b32_e32 [[VY:v[0-9]+]], [[SY]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
9 ; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, [[X]], [[VY]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
10 ; GFX89: v_cvt_pkrtz_f16_f32 v{{[0-9]+}}, [[X]], [[VY]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
11 define amdgpu_kernel void @s_cvt_pkrtz_v2f16_f32(<2 x half> addrspace(1)* %out, float %x, float %y) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
12 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %y)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
13 store <2 x half> %result, <2 x half> addrspace(1)* %out
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
14 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
15 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
16
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
17 ; GCN-LABEL: {{^}}s_cvt_pkrtz_samereg_v2f16_f32:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
18 ; GCN: s_load_dword [[X:s[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
19 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, [[X]], [[X]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
20 define amdgpu_kernel void @s_cvt_pkrtz_samereg_v2f16_f32(<2 x half> addrspace(1)* %out, float %x) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
21 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %x)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
22 store <2 x half> %result, <2 x half> addrspace(1)* %out
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
23 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
24 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
25
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
26 ; FIXME: Folds to 0 on gfx9
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
27 ; GCN-LABEL: {{^}}s_cvt_pkrtz_undef_undef:
134
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
28 ; GCN-NEXT: ; %bb.0
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
29 ; SI-NEXT: s_endpgm
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
30 ; VI-NEXT: s_endpgm
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
31 ; GFX9: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
32 define amdgpu_kernel void @s_cvt_pkrtz_undef_undef(<2 x half> addrspace(1)* %out) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
33 %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float undef, float undef)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
34 store <2 x half> %result, <2 x half> addrspace(1)* %out
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
35 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
36 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
37
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
38 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
39 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
40 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
41 ; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, [[A]], [[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
42 ; GFX89: v_cvt_pkrtz_f16_f32 v{{[0-9]+}}, [[A]], [[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
43 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
44 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
45 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
46 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
47 %b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
48 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
49 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
50 %b = load volatile float, float addrspace(1)* %b.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
51 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
52 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
53 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
54 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
55
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
56 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_reg_imm:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
57 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
58 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, [[A]], 1.0
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
59 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_reg_imm(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
60 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
61 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
62 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
63 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
64 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
65 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float 1.0)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
66 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
67 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
68 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
69
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
70 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_imm_reg:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
71 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
72 ; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, 1.0, [[A]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
73 ; GFX89: v_cvt_pkrtz_f16_f32 v{{[0-9]+}}, 1.0, [[A]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
74 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_imm_reg(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
75 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
76 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
77 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
78 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
79 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
80 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 1.0, float %a)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
81 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
82 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
83 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
84
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
85 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_lo:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
86 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
87 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
88 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, -[[A]], [[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
89 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
90 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
91 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
92 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
93 %b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
94 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
95 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
96 %b = load volatile float, float addrspace(1)* %b.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
97 %neg.a = fsub float -0.0, %a
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
98 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %b)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
99 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
100 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
101 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
102
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
103 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_hi:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
104 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
105 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
106 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, [[A]], -[[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
107 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
108 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
109 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
110 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
111 %b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
112 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
113 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
114 %b = load volatile float, float addrspace(1)* %b.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
115 %neg.b = fsub float -0.0, %b
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
116 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %neg.b)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
117 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
118 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
119 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
120
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
121 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
122 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
123 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
124 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, -[[A]], -[[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
125 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
126 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
127 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
128 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
129 %b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
130 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
131 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
132 %b = load volatile float, float addrspace(1)* %b.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
133 %neg.a = fsub float -0.0, %a
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
134 %neg.b = fsub float -0.0, %b
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
135 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %neg.b)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
136 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
137 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
138 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
139
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
140 ; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
141 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
142 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
143 ; GCN: v_cvt_pkrtz_f16_f32{{(_e64)*}} v{{[0-9]+}}, -|[[A]]|, -[[B]]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
144 define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
145 %tid = call i32 @llvm.amdgcn.workitem.id.x()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
146 %tid.ext = sext i32 %tid to i64
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
147 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
148 %b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
149 %out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
150 %a = load volatile float, float addrspace(1)* %a.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
151 %b = load volatile float, float addrspace(1)* %b.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
152 %fabs.a = call float @llvm.fabs.f32(float %a)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
153 %neg.fabs.a = fsub float -0.0, %fabs.a
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
154 %neg.b = fsub float -0.0, %b
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
155 %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.fabs.a, float %neg.b)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
156 store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
157 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
158 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
159
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
160 declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
161 declare float @llvm.fabs.f32(float) #1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
162 declare i32 @llvm.amdgcn.workitem.id.x() #1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
163
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
164
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
165 attributes #0 = { nounwind }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
166 attributes #1 = { nounwind readnone }