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annotate test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll @ 146:3fc4d5c3e21e

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set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 803732b1fca8
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 -check-prefix=NOAUTO %s
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2 ; RUN: llc -march=amdgcn -mattr=+auto-waitcnt-before-barrier -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 -check-prefix=AUTO %s
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3 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=NOAUTO %s
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4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+auto-waitcnt-before-barrier -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=AUTO %s
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6 ; GCN-LABEL: {{^}}test_barrier:
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7 ; GFX8: buffer_store_dword
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8 ; GFX9: global_store_dword
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9 ; NOAUTO: s_waitcnt
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10 ; AUTO-NOT: s_waitcnt
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11 ; GCN: s_barrier
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12 define amdgpu_kernel void @test_barrier(i32 addrspace(1)* %out, i32 %size) #0 {
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13 entry:
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14 %tmp = call i32 @llvm.amdgcn.workitem.id.x()
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15 %tmp1 = getelementptr i32, i32 addrspace(1)* %out, i32 %tmp
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16 store i32 %tmp, i32 addrspace(1)* %tmp1
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17 call void @llvm.amdgcn.s.barrier()
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18 %tmp3 = sub i32 %size, 1
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19 %tmp4 = sub i32 %tmp3, %tmp
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20 %tmp5 = getelementptr i32, i32 addrspace(1)* %out, i32 %tmp4
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21 %tmp6 = load i32, i32 addrspace(1)* %tmp5
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22 store i32 %tmp6, i32 addrspace(1)* %tmp1
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23 ret void
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24 }
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26 declare void @llvm.amdgcn.s.barrier() #1
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27 declare i32 @llvm.amdgcn.workitem.id.x() #2
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29 attributes #0 = { nounwind }
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30 attributes #1 = { convergent nounwind }
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31 attributes #2 = { nounwind readnone }