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annotate test/CodeGen/AMDGPU/max.ll @ 146:3fc4d5c3e21e

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set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 803732b1fca8
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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3
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4
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5 ; FUNC-LABEL: {{^}}v_test_imax_sge_i32:
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6 ; SI: v_max_i32_e32
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7
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8 ; EG: MAX_INT
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9 define amdgpu_kernel void @v_test_imax_sge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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10 %a = load i32, i32 addrspace(1)* %aptr, align 4
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11 %b = load i32, i32 addrspace(1)* %bptr, align 4
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12 %cmp = icmp sge i32 %a, %b
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13 %val = select i1 %cmp, i32 %a, i32 %b
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14 store i32 %val, i32 addrspace(1)* %out, align 4
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15 ret void
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16 }
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18 ; FUNC-LABEL: {{^}}v_test_imax_sge_v4i32:
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19 ; SI: v_max_i32_e32
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20 ; SI: v_max_i32_e32
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21 ; SI: v_max_i32_e32
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22 ; SI: v_max_i32_e32
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23
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24 ; These could be merged into one
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25 ; EG: MAX_INT
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26 ; EG: MAX_INT
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27 ; EG: MAX_INT
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28 ; EG: MAX_INT
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29 define amdgpu_kernel void @v_test_imax_sge_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %aptr, <4 x i32> addrspace(1)* %bptr) nounwind {
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30 %a = load <4 x i32>, <4 x i32> addrspace(1)* %aptr, align 4
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31 %b = load <4 x i32>, <4 x i32> addrspace(1)* %bptr, align 4
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32 %cmp = icmp sge <4 x i32> %a, %b
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33 %val = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b
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34 store <4 x i32> %val, <4 x i32> addrspace(1)* %out, align 4
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35 ret void
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36 }
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37
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38 ; FUNC-LABEL: @s_test_imax_sge_i32
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39 ; SI: s_max_i32
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40
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41 ; EG: MAX_INT
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42 define amdgpu_kernel void @s_test_imax_sge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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43 %cmp = icmp sge i32 %a, %b
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44 %val = select i1 %cmp, i32 %a, i32 %b
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45 store i32 %val, i32 addrspace(1)* %out, align 4
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46 ret void
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47 }
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48
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49 ; FUNC-LABEL: {{^}}s_test_imax_sge_imm_i32:
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50 ; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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51
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52 ; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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53 define amdgpu_kernel void @s_test_imax_sge_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
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54 %cmp = icmp sge i32 %a, 9
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55 %val = select i1 %cmp, i32 %a, i32 9
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56 store i32 %val, i32 addrspace(1)* %out, align 4
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57 ret void
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58 }
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60 ; FUNC-LABEL: {{^}}v_test_imax_sge_i8:
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61 ; SI: buffer_load_sbyte
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62 ; SI: buffer_load_sbyte
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63 ; SI: v_max_i32_e32
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64
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65 ; EG: MAX_INT
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66 define amdgpu_kernel void @v_test_imax_sge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
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67 %a = load i8, i8 addrspace(1)* %aptr, align 1
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68 %b = load i8, i8 addrspace(1)* %bptr, align 1
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69 %cmp = icmp sge i8 %a, %b
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70 %val = select i1 %cmp, i8 %a, i8 %b
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71 store i8 %val, i8 addrspace(1)* %out, align 1
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72 ret void
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73 }
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74
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75 ; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_i32:
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76 ; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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77
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78 ; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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79 define amdgpu_kernel void @s_test_imax_sgt_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
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80 %cmp = icmp sgt i32 %a, 9
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81 %val = select i1 %cmp, i32 %a, i32 9
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82 store i32 %val, i32 addrspace(1)* %out, align 4
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83 ret void
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84 }
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85
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86 ; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_v2i32:
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87 ; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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88 ; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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89
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90 ; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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91 ; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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92 define amdgpu_kernel void @s_test_imax_sgt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
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93 %cmp = icmp sgt <2 x i32> %a, <i32 9, i32 9>
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94 %val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 9, i32 9>
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95 store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
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96 ret void
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97 }
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98
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99 ; FUNC-LABEL: @v_test_imax_sgt_i32
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100 ; SI: v_max_i32_e32
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101
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102 ; EG: MAX_INT
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103 define amdgpu_kernel void @v_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
120
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104 %a = load i32, i32 addrspace(1)* %aptr, align 4
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105 %b = load i32, i32 addrspace(1)* %bptr, align 4
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106 %cmp = icmp sgt i32 %a, %b
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107 %val = select i1 %cmp, i32 %a, i32 %b
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108 store i32 %val, i32 addrspace(1)* %out, align 4
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109 ret void
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110 }
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111
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112 ; FUNC-LABEL: @s_test_imax_sgt_i32
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113 ; SI: s_max_i32
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114
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115 ; EG: MAX_INT
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116 define amdgpu_kernel void @s_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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117 %cmp = icmp sgt i32 %a, %b
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118 %val = select i1 %cmp, i32 %a, i32 %b
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119 store i32 %val, i32 addrspace(1)* %out, align 4
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120 ret void
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121 }
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122
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123 ; FUNC-LABEL: @v_test_umax_uge_i32
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124 ; SI: v_max_u32_e32
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125
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126 ; EG: MAX_UINT
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127 define amdgpu_kernel void @v_test_umax_uge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
120
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128 %a = load i32, i32 addrspace(1)* %aptr, align 4
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129 %b = load i32, i32 addrspace(1)* %bptr, align 4
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130 %cmp = icmp uge i32 %a, %b
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 %val = select i1 %cmp, i32 %a, i32 %b
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
132 store i32 %val, i32 addrspace(1)* %out, align 4
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 ; FUNC-LABEL: @s_test_umax_uge_i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 ; SI: s_max_u32
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
138
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
139 ; EG: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
140 define amdgpu_kernel void @s_test_umax_uge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 %cmp = icmp uge i32 %a, %b
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 %val = select i1 %cmp, i32 %a, i32 %b
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 store i32 %val, i32 addrspace(1)* %out, align 4
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
147 ; FUNC-LABEL: {{^}}s_test_umax_uge_v3i32:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
148 ; SI: s_max_u32
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
149 ; SI: s_max_u32
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
150 ; SI: s_max_u32
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
151 ; SI-NOT: s_max_u32
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
152 ; SI: s_endpgm
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
153
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
154 ; EG: MAX_UINT
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
155 ; EG: MAX_UINT
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
156 ; EG: MAX_UINT
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
157 ; EG-NOT: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
158 define amdgpu_kernel void @s_test_umax_uge_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a, <3 x i32> %b) nounwind {
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
159 %cmp = icmp uge <3 x i32> %a, %b
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
160 %val = select <3 x i1> %cmp, <3 x i32> %a, <3 x i32> %b
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
161 store <3 x i32> %val, <3 x i32> addrspace(1)* %out, align 4
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
162 ret void
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
163 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
164
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
165 ; FUNC-LABEL: {{^}}v_test_umax_uge_i8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
166 ; SI: buffer_load_ubyte
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
167 ; SI: buffer_load_ubyte
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
168 ; SI: v_max_u32_e32
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
169
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
170 ; EG: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
171 define amdgpu_kernel void @v_test_umax_uge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
172 %a = load i8, i8 addrspace(1)* %aptr, align 1
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
173 %b = load i8, i8 addrspace(1)* %bptr, align 1
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
174 %cmp = icmp uge i8 %a, %b
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
175 %val = select i1 %cmp, i8 %a, i8 %b
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
176 store i8 %val, i8 addrspace(1)* %out, align 1
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
177 ret void
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
178 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
179
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 ; FUNC-LABEL: @v_test_umax_ugt_i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 ; SI: v_max_u32_e32
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
182
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
183 ; EG: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
184 define amdgpu_kernel void @v_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
185 %a = load i32, i32 addrspace(1)* %aptr, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
186 %b = load i32, i32 addrspace(1)* %bptr, align 4
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 %cmp = icmp ugt i32 %a, %b
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 %val = select i1 %cmp, i32 %a, i32 %b
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
189 store i32 %val, i32 addrspace(1)* %out, align 4
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
193 ; FUNC-LABEL: {{^}}s_test_umax_ugt_i32:
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 ; SI: s_max_u32
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
195
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
196 ; EG: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
197 define amdgpu_kernel void @s_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 %cmp = icmp ugt i32 %a, %b
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 %val = select i1 %cmp, i32 %a, i32 %b
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 store i32 %val, i32 addrspace(1)* %out, align 4
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
204 ; FUNC-LABEL: {{^}}s_test_umax_ugt_imm_v2i32:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
205 ; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 15
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
206 ; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 23
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
207
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
208 ; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
209 ; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
210 define amdgpu_kernel void @s_test_umax_ugt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
211 %cmp = icmp ugt <2 x i32> %a, <i32 15, i32 23>
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
212 %val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 15, i32 23>
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
213 store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
214 ret void
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
215 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
216
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 ; Make sure redundant and removed
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_umax_ugt_i16:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
221 ; SI: s_max_u32 [[MAX:s[0-9]+]], [[A]], [[B]]
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
222 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
223 ; SI: buffer_store_dword [[VMAX]]
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
224
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
225 ; EG: MAX_UINT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
226 define amdgpu_kernel void @simplify_demanded_bits_test_umax_ugt_i16(i32 addrspace(1)* %out, i16 zeroext %a, i16 zeroext %b) nounwind {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 %a.ext = zext i16 %a to i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 %b.ext = zext i16 %b to i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 %cmp = icmp ugt i32 %a.ext, %b.ext
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 %mask = and i32 %val, 65535
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 store i32 %mask, i32 addrspace(1)* %out
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 ; Make sure redundant sign_extend_inreg removed.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
238 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_max_slt_i16:
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
241 ; SI: s_max_i32 [[MAX:s[0-9]+]], [[A]], [[B]]
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
242 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
243 ; SI: buffer_store_dword [[VMAX]]
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
244
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
245 ; EG: MAX_INT
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
246 define amdgpu_kernel void @simplify_demanded_bits_test_max_slt_i16(i32 addrspace(1)* %out, i16 signext %a, i16 signext %b) nounwind {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 %a.ext = sext i16 %a to i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 %b.ext = sext i16 %b to i32
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 %cmp = icmp sgt i32 %a.ext, %b.ext
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 %shl = shl i32 %val, 16
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 %sextinreg = ashr i32 %shl, 16
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 store i32 %sextinreg, i32 addrspace(1)* %out
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 ret void
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
257 ; FUNC-LABEL: {{^}}s_test_imax_sge_i16:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
258 ; SI: s_load_dword
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
259 ; SI: s_load_dword
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 ; SI: s_sext_i32_i16
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 ; SI: s_sext_i32_i16
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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262 ; SI: s_max_i32
120
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263
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264 ; EG: MAX_INT
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265 define amdgpu_kernel void @s_test_imax_sge_i16(i16 addrspace(1)* %out, i16 %a, i16 %b) nounwind {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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266 %cmp = icmp sge i16 %a, %b
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parents:
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267 %val = select i1 %cmp, i16 %a, i16 %b
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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268 store i16 %val, i16 addrspace(1)* %out
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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269 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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270 }
120
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271
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272 ; 64 bit
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273 ; FUNC-LABEL: {{^}}test_umax_ugt_i64
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274 ; SI: s_endpgm
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275
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276 ; EG: MAX_UINT
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277 ; EG: MAX_UINT
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parents: 120
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278 define amdgpu_kernel void @test_umax_ugt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
120
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279 %tmp = icmp ugt i64 %a, %b
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280 %val = select i1 %tmp, i64 %a, i64 %b
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281 store i64 %val, i64 addrspace(1)* %out, align 8
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282 ret void
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283 }
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284
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285 ; FUNC-LABEL: {{^}}test_umax_uge_i64
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286 ; SI: s_endpgm
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287
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288 ; EG: MAX_UINT
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289 ; EG: MAX_UINT
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290 define amdgpu_kernel void @test_umax_uge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
120
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291 %tmp = icmp uge i64 %a, %b
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292 %val = select i1 %tmp, i64 %a, i64 %b
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293 store i64 %val, i64 addrspace(1)* %out, align 8
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294 ret void
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295 }
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296
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297 ; FUNC-LABEL: {{^}}test_imax_sgt_i64
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298 ; SI: s_endpgm
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299
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300 ; EG-DAG: MAX_UINT
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301 ; EG-DAG: MAX_INT
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parents: 120
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302 define amdgpu_kernel void @test_imax_sgt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
120
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303 %tmp = icmp sgt i64 %a, %b
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304 %val = select i1 %tmp, i64 %a, i64 %b
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305 store i64 %val, i64 addrspace(1)* %out, align 8
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306 ret void
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307 }
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308
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309 ; FUNC-LABEL: {{^}}test_imax_sge_i64
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310 ; SI: s_endpgm
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311
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312 ; EG-DAG: MAX_UINT
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313 ; EG-DAG: MAX_INT
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kono
parents: 120
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314 define amdgpu_kernel void @test_imax_sge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
120
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315 %tmp = icmp sge i64 %a, %b
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316 %val = select i1 %tmp, i64 %a, i64 %b
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317 store i64 %val, i64 addrspace(1)* %out, align 8
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318 ret void
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319 }