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121
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1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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120
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3
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4 ; GCN-LABEL: {{^}}uitofp_i16_to_f16
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5 ; GCN: buffer_load_ushort v[[A_I16:[0-9]+]]
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6 ; SI: v_cvt_f32_u32_e32 v[[A_F32:[0-9]+]], v[[A_I16]]
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7 ; VI: v_cvt_f32_i32_e32 v[[A_F32:[0-9]+]], v[[A_I16]]
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8 ; GCN: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[A_F32]]
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9 ; GCN: buffer_store_short v[[R_F16]]
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10 ; GCN: s_endpgm
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121
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11 define amdgpu_kernel void @uitofp_i16_to_f16(
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120
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12 half addrspace(1)* %r,
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13 i16 addrspace(1)* %a) {
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14 entry:
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15 %a.val = load i16, i16 addrspace(1)* %a
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16 %r.val = uitofp i16 %a.val to half
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17 store half %r.val, half addrspace(1)* %r
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18 ret void
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19 }
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20
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21 ; GCN-LABEL: {{^}}uitofp_i32_to_f16
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22 ; GCN: buffer_load_dword v[[A_I32:[0-9]+]]
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23 ; GCN: v_cvt_f32_u32_e32 v[[A_I16:[0-9]+]], v[[A_I32]]
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24 ; GCN: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[A_I16]]
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25 ; GCN: buffer_store_short v[[R_F16]]
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26 ; GCN: s_endpgm
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121
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27 define amdgpu_kernel void @uitofp_i32_to_f16(
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120
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28 half addrspace(1)* %r,
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29 i32 addrspace(1)* %a) {
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30 entry:
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31 %a.val = load i32, i32 addrspace(1)* %a
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32 %r.val = uitofp i32 %a.val to half
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33 store half %r.val, half addrspace(1)* %r
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34 ret void
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35 }
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36
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37 ; f16 = uitofp i64 is in uint_to_fp.i64.ll
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38
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39 ; GCN-LABEL: {{^}}uitofp_v2i16_to_v2f16
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40 ; GCN: buffer_load_dword
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121
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41
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42 ; SI: v_cvt_f32_u32_e32
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43 ; SI: v_cvt_f32_u32_e32
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44 ; SI: v_cvt_f16_f32_e32
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45 ; SI: v_cvt_f16_f32_e32
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46 ; SI-DAG: v_lshlrev_b32_e32
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47 ; SI: v_or_b32_e32
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48
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49 ; VI-DAG: v_cvt_f16_f32_e32
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50 ; VI-DAG: v_cvt_f32_i32_sdwa
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51 ; VI-DAG: v_cvt_f32_i32_sdwa
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52 ; VI-DAG: v_cvt_f16_f32_sdwa
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53 ; VI: v_or_b32_e32
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54
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55 ; GCN: buffer_store_dword
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56 ; GCN: s_endpgm
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57 define amdgpu_kernel void @uitofp_v2i16_to_v2f16(
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120
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58 <2 x half> addrspace(1)* %r,
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59 <2 x i16> addrspace(1)* %a) {
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60 entry:
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61 %a.val = load <2 x i16>, <2 x i16> addrspace(1)* %a
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62 %r.val = uitofp <2 x i16> %a.val to <2 x half>
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63 store <2 x half> %r.val, <2 x half> addrspace(1)* %r
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64 ret void
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65 }
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66
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67 ; GCN-LABEL: {{^}}uitofp_v2i32_to_v2f16
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68 ; GCN: buffer_load_dwordx2
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121
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69
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70 ; SI: v_cvt_f32_u32_e32
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71 ; SI: v_cvt_f32_u32_e32
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72 ; SI: v_cvt_f16_f32_e32
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73 ; SI: v_cvt_f16_f32_e32
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74 ; SI-DAG: v_lshlrev_b32_e32
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75 ; SI: v_or_b32_e32
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76
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77 ; VI-DAG: v_cvt_f32_u32_e32
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78 ; VI-DAG: v_cvt_f32_u32_e32
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79 ; VI-DAG: v_cvt_f16_f32_e32
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80 ; VI-DAG: v_cvt_f16_f32_sdwa
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81 ; VI: v_or_b32_e32
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82
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120
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83 ; GCN: buffer_store_dword
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84 ; GCN: s_endpgm
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121
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85 define amdgpu_kernel void @uitofp_v2i32_to_v2f16(
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120
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86 <2 x half> addrspace(1)* %r,
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87 <2 x i32> addrspace(1)* %a) {
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88 entry:
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89 %a.val = load <2 x i32>, <2 x i32> addrspace(1)* %a
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90 %r.val = uitofp <2 x i32> %a.val to <2 x half>
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91 store <2 x half> %r.val, <2 x half> addrspace(1)* %r
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92 ret void
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93 }
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94
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95 ; f16 = uitofp i64 is in uint_to_fp.i64.ll
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