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120
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1 # RUN: llc -march=hexagon -run-pass expand-condsets -expand-condsets-coa-limit=0 -o - %s -verify-machineinstrs | FileCheck %s
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2
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3 # CHECK-LABEL: name: fred
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4
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5 --- |
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6 define void @fred() { ret void }
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7
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8 ...
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9 ---
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10
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11 name: fred
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12 tracksRegLiveness: true
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13 registers:
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14 - { id: 0, class: predregs }
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15 - { id: 1, class: intregs }
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16 - { id: 2, class: intregs }
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17 - { id: 3, class: intregs }
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18
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19 body: |
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20 bb.0:
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134
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21 liveins: $r0, $r1, $r2, $p0
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22 %0 = COPY $p0
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23 %0 = COPY $p0 ; Cheat: convince MIR parser that this is not SSA.
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24 %1 = COPY $r1
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120
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25 ; Make sure we do not expand/predicate a mux with identical inputs.
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26 ; CHECK-NOT: A2_paddit
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27 %2 = A2_addi %1, 1
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28 %3 = C2_mux %0, killed %2, %2
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134
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29 $r0 = COPY %3
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120
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30
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31 ...
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32
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