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120
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1 ; RUN: llc -march=hexagon < %s
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2 ; REQUIRES: asserts
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3
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4 ; Test that the HexagonExpandCondsets pass does not assert due to
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5 ; attempting to shrink a live interval incorrectly.
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6
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7
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8 define void @test() #0 {
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9 entry:
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10 br i1 undef, label %cleanup, label %if.end
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11
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12 if.end:
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13 %0 = load i32, i32* undef, align 4
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14 %sext = shl i32 %0, 16
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15 %conv19 = ashr exact i32 %sext, 16
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16 br i1 undef, label %cleanup, label %for.body.lr.ph
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17
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18 for.body.lr.ph:
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19 br label %for.body
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20
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21 for.body:
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22 %bestScoreL16Q4.0278 = phi i16 [ 32767, %for.body.lr.ph ], [ %.sink, %early_termination ]
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23 br i1 false, label %for.body44.lr.ph, label %for.cond90.preheader
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24
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25 for.body44.lr.ph:
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26 %conv77 = sext i16 %bestScoreL16Q4.0278 to i32
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27 unreachable
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28
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29 for.cond90.preheader:
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30 br i1 undef, label %early_termination, label %for.body97
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31
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32 for.body97:
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33 br i1 undef, label %for.body97, label %early_termination
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34
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35 early_termination:
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36 %.sink = select i1 undef, i16 undef, i16 %bestScoreL16Q4.0278
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37 %cmp27 = icmp slt i32 undef, %conv19
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38 br i1 %cmp27, label %for.body, label %for.end124
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39
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40 for.end124:
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41 unreachable
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42
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43 cleanup:
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44 ret void
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45 }
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46
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47 attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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