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annotate test/CodeGen/Hexagon/inline-asm-hexagon.ll @ 146:3fc4d5c3e21e

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set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2
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3 target triple = "hexagon"
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4
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5 ;CHECK: [[REGH:r[0-9]]]:[[REGL:[0-9]]] = memd_locked
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6 ;CHECK: HIGH([[REGH]])
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7 ;CHECK: LOW(r[[REGL]])
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8 define i32 @fred(i64* %free_list_ptr, i32** %item_ptr, i8** %free_item_ptr) nounwind {
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9 entry:
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10 %free_list_ptr.addr = alloca i64*, align 4
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11 store i64* %free_list_ptr, i64** %free_list_ptr.addr, align 4
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12 %0 = load i32*, i32** %item_ptr, align 4
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13 %1 = call { i64, i32 } asm sideeffect "1: $0 = memd_locked($5)\0A\09 $1 = HIGH(${0:H}) \0A\09 $1 = add($1,#1) \0A\09 memw($6) = LOW(${0:L}) \0A\09 $0 = combine($7,$1) \0A\09 memd_locked($5,p0) = $0 \0A\09 if !p0 jump 1b\0A\09", "=&r,=&r,=*m,=*m,r,r,r,r,*m,*m,~{p0}"(i64** %free_list_ptr.addr, i8** %free_item_ptr, i64 0, i64* %free_list_ptr, i8** %free_item_ptr, i32* %0, i64** %free_list_ptr.addr, i8** %free_item_ptr) nounwind
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14 %asmresult1 = extractvalue { i64, i32 } %1, 1
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15 ret i32 %asmresult1
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16 }