121
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2 ;
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3 ; Check that this testcase doesn't crash.
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4 ; CHECK: vadd
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5
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6 target triple = "hexagon"
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7
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8 define void @fred() #0 {
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9 b0:
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10 br label %b1
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11
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12 b1: ; preds = %b7, %b0
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13 %v2 = phi i32 [ 0, %b0 ], [ %v16, %b7 ]
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14 %v3 = phi <32 x i32> [ undef, %b0 ], [ %v15, %b7 ]
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15 %v4 = icmp slt i32 %v2, undef
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16 br i1 %v4, label %b5, label %b7
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17
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18 b5: ; preds = %b1
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19 %v6 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v3, <32 x i32> undef)
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20 br label %b7
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21
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22 b7: ; preds = %b5, %b1
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23 %v8 = phi <32 x i32> [ %v6, %b5 ], [ %v3, %b1 ]
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24 %v9 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v8, <32 x i32> undef)
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25 %v10 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v9, <32 x i32> undef)
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26 %v11 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v10, <32 x i32> undef)
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27 %v12 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v11, <32 x i32> undef)
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28 %v13 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v12, <32 x i32> zeroinitializer)
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29 %v14 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v13, <32 x i32> undef)
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30 %v15 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v14, <32 x i32> undef)
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31 %v16 = add nsw i32 %v2, 8
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32 %v17 = icmp eq i32 %v16, 64
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33 br i1 %v17, label %b18, label %b1
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34
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35 b18: ; preds = %b7
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36 tail call void @f0() #0
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37 ret void
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38 }
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39
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40 declare <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32>, <32 x i32>) #1
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41 declare void @f0() #0
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42
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43 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }
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44 attributes #1 = { nounwind readnone }
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