annotate test/CodeGen/Hexagon/newvaluejump-kill.ll @ 146:3fc4d5c3e21e

set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 3a76565eade5
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
1 ; RUN: llc -march=hexagon -O3 -verify-machineinstrs < %s | FileCheck %s
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
2 ;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
3 ; Check that this testcase compiles successfully and that a new-value jump
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
4 ; has been created.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
5 ; CHECK: if (cmp.gtu(r{{[0-9]+}}.new,r{{[0-9]+}})) jump
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
6
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
7 target triple = "hexagon"
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
8
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
9 @g0 = external hidden unnamed_addr global [182 x i16], align 8
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
10
134
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
11 define void @fred(i16 signext %a0, i16 signext %a1) #0 {
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
12 b1:
134
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
13 %v1 = sext i16 %a0 to i32
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
14 %v2 = getelementptr inbounds [182 x i16], [182 x i16]* @g0, i32 0, i32 %v1
3a76565eade5 update 5.0.1
mir3636
parents: 121
diff changeset
15 %v3 = sext i16 %a1 to i32
121
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
16 %v4 = call i32 @llvm.hexagon.A2.asrh(i32 undef)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
17 %v5 = trunc i32 %v4 to i16
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
18 br i1 undef, label %b6, label %b14
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
19
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
20 b6: ; preds = %b1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
21 %v7 = sext i16 %v5 to i32
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
22 br label %b8
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
23
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
24 b8: ; preds = %b8, %b6
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
25 %v9 = phi i32 [ 128, %b6 ], [ %v13, %b8 ]
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
26 %v10 = sub nsw i32 %v9, %v7
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
27 %v11 = getelementptr inbounds [182 x i16], [182 x i16]* @g0, i32 0, i32 %v10
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
28 %v12 = load i16, i16* %v11, align 2
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
29 %v13 = add nuw nsw i32 %v9, 1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
30 br label %b8
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
31
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
32 b14: ; preds = %b1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
33 br i1 undef, label %b16, label %b15
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
34
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
35 b15: ; preds = %b14
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
36 unreachable
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
37
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
38 b16: ; preds = %b14
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
39 %v17 = getelementptr [182 x i16], [182 x i16]* @g0, i32 0, i32 %v3
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
40 %v18 = icmp ugt i16* %v17, %v2
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
41 %v19 = or i1 %v18, undef
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
42 br i1 %v19, label %b20, label %b21
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
43
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
44 b20: ; preds = %b16
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
45 unreachable
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
46
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
47 b21: ; preds = %b16
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
48 ret void
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
49 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
50
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
51 declare i32 @llvm.hexagon.A2.asrh(i32) #1
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
52
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
53 attributes #0 = { nounwind "target-cpu"="hexagonv62" }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
54 attributes #1 = { nounwind readnone }