annotate test/CodeGen/Thumb2/ifcvt-rescan-diamonds.ll @ 146:3fc4d5c3e21e

set tail call flag for code segment in CGCAll
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 23 Dec 2018 19:23:36 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
120
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
1 ; RUN: llc -O2 -o - %s | FileCheck %s
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
2 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
3 target triple = "thumbv8-unknown-linux-gnueabihf"
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
5 ; This is a tricky test case.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
6 ; The point of it is to create a diamond where both the true block and the
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
7 ; false block clobber the predicate when viewed as a whole, but only one of them
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
8 ; clobbers the predicate when considering the instructions they share.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
9
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
10 ; Function Attrs: nounwind
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
11 define void @BN_kronecker(i1 %a, i32 %b) #0 {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
12 entry:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
13 br label %while.cond38
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
14
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
15 while.cond38: ; preds = %if.end111, %entry
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
16 %cmp79 = icmp eq i32 0, 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
17 br i1 %a, label %cond.true77, label %cond.false87
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
18
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
19 ; CHECK: %cond.true77
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
20 ; CHECK-NEXT: @ in Loop
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
21 ; CHECK-NEXT: cmp.w {{r[0-9]+}}, #0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
22 ; CHECK-NEXT: it eq
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
23 ; CHECK-NEXT: ldreq
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
24 ; CHECK-NEXT: it ne
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
25 ; CHECK-NEXT: movsne
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
26 ; CHECK-NEXT: mvns
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
27 ; CHECK-NEXT: b
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
28 cond.true77: ; preds = %while.cond38
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
29 br i1 %cmp79, label %cond.end84, label %cond.false81
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
30
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
31 cond.false81: ; preds = %cond.true77
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
32 %0 = load i32, i32* null, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
33 br label %cond.end84
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
34
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
35 cond.end84: ; preds = %cond.false81, %cond.true77
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
36 %cond85 = phi i32 [ %0, %cond.false81 ], [ 0, %cond.true77 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
37 %neg86 = xor i32 %cond85, -1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
38 br label %cond.false101
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
39
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
40 cond.false87: ; preds = %while.cond38
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
41 br i1 %cmp79, label %cond.false101, label %cond.false91
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
42
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
43 cond.false91: ; preds = %cond.false87
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
44 br label %cond.false101
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
45
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
46 cond.false101: ; preds = %cond.false91, %cond.false87, %cond.end84
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
47 %cond97 = phi i32 [ %neg86, %cond.end84 ], [ %b, %cond.false91 ], [ 0, %cond.false87 ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
48 %1 = load i32, i32* null, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
49 %and106 = and i32 %cond97, %1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
50 %and107 = and i32 %and106, 2
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
51 %tobool108 = icmp ne i32 %and107, 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
52 br i1 %tobool108, label %if.then109, label %if.end111
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
53
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
54 if.then109: ; preds = %cond.false101
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
55 store i32 0, i32* undef, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
56 br label %if.end111
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
57
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
58 if.end111: ; preds = %if.then109, %cond.false101
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
59 %tobool113 = icmp ne i32 0, 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
60 br i1 %tobool113, label %while.cond38, label %end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
61
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
62 end: ; preds = %if.end111
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
63 ret void
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
64 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
65
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
66 attributes #0 = { nounwind }