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annotate test/MC/Disassembler/AArch64/basic-a64-unpredictable.txt @ 17:5e1f5bc27634

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remove codeFlag for llvm type and add __CodeTy
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Sat, 05 Oct 2013 22:04:18 +0900
parents 9ad51c7bc036
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 # RUN: llvm-mc -triple=aarch64 -disassemble < %s 2>&1 | FileCheck %s
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3 #------------------------------------------------------------------------------
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4 # Load-store exclusive
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5 #------------------------------------------------------------------------------
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6
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7 #ldxp x14, x14, [sp]
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8 0xee 0x3b 0x7f 0xc8
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9 #CHECK: warning: potentially undefined instruction encoding
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10 #CHECK-NEXT: 0xee 0x3b 0x7f 0xc8
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11
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12 #ldaxp w19, w19, [x1]
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13 0x33 0xcc 0x7f 0x88
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14 #CHECK: warning: potentially undefined instruction encoding
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15 #CHECK-NEXT: 0x33 0xcc 0x7f 0x88
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16
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17 #------------------------------------------------------------------------------
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18 # Load-store register (immediate post-indexed)
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19 #------------------------------------------------------------------------------
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20
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21 0x63 0x44 0x40 0xf8
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22 #CHECK: warning: potentially undefined instruction encoding
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23 #CHECK-NEXT: 0x63 0x44 0x40 0xf8
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25 0x42 0x14 0xc0 0x38
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26 #CHECK: warning: potentially undefined instruction encoding
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27 #CHECK-NEXT: 0x42 0x14 0xc0 0x38
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29 #------------------------------------------------------------------------------
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30 # Load-store register (immediate pre-indexed)
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31 #------------------------------------------------------------------------------
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32
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33 0x63 0x4c 0x40 0xf8
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34 #CHECK: warning: potentially undefined instruction encoding
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35 #CHECK-NEXT: 0x63 0x4c 0x40 0xf8
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38 #CHECK: warning: potentially undefined instruction encoding
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39 #CHECK-NEXT: 0x42 0x1c 0xc0 0x38
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41 #------------------------------------------------------------------------------
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42 # Load-store register pair (offset)
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43 #------------------------------------------------------------------------------
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44
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45 # Unpredictable if Rt == Rt2 on a load.
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47 0xe3 0x0f 0x40 0xa9
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48 # CHECK: warning: potentially undefined instruction encoding
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49 # CHECK-NEXT: 0xe3 0x0f 0x40 0xa9
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50 # CHECK-NEXT: ^
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52 0xe2 0x8b 0x41 0x69
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53 # CHECK: warning: potentially undefined instruction encoding
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54 # CHECK-NEXT: 0xe2 0x8b 0x41 0x69
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55 # CHECK-NEXT: ^
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58 # CHECK: warning: potentially undefined instruction encoding
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59 # CHECK-NEXT: 0x82 0x88 0x40 0x2d
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60 # CHECK-NEXT: ^
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62 #------------------------------------------------------------------------------
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63 # Load-store register pair (post-indexed)
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64 #------------------------------------------------------------------------------
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66 # Unpredictable if Rt == Rt2 on a load.
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68 0xe3 0x0f 0xc0 0xa8
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69 # CHECK: warning: potentially undefined instruction encoding
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70 # CHECK-NEXT: 0xe3 0x0f 0xc0 0xa8
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71 # CHECK-NEXT: ^
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73 0xe2 0x8b 0xc1 0x68
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74 # CHECK: warning: potentially undefined instruction encoding
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75 # CHECK-NEXT: 0xe2 0x8b 0xc1 0x68
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76 # CHECK-NEXT: ^
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78 0x82 0x88 0xc0 0x2c
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79 # CHECK: warning: potentially undefined instruction encoding
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80 # CHECK-NEXT: 0x82 0x88 0xc0 0x2c
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81 # CHECK-NEXT: ^
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82
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83 # Also unpredictable if writeback clashes with either transfer register
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85 0x63 0x94 0xc0 0xa8
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86 # CHECK: warning: potentially undefined instruction encoding
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87 # CHECK-NEXT: 0x63 0x94 0xc0 0xa8
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89 0x69 0x2d 0x81 0xa8
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90 # CHECK: warning: potentially undefined instruction encoding
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91 # CHECK-NEXT: 0x69 0x2d 0x81 0xa8
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93 0x29 0xad 0xc0 0x28
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94 # CHECK: warning: potentially undefined instruction encoding
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95 # CHECK-NEXT: 0x29 0xad 0xc0 0x28
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96