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annotate test/DebugInfo/X86/dbg-declare-arg.ll @ 85:5e5d649e25d2

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Update LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Thu, 19 Feb 2015 15:19:25 +0900
parents 60c9769439b8
children afa8332a0e37
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1 ; RUN: llc -O0 -fast-isel=false < %s | FileCheck %s
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2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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3 target triple = "x86_64-apple-macosx10.6.7"
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4 ;Radar 9321650
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5
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6 ;CHECK: ##DEBUG_VALUE: my_a
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7
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8 %class.A = type { i32, i32, i32, i32 }
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10 define void @_Z3fooi(%class.A* sret %agg.result, i32 %i) ssp {
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11 entry:
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12 %i.addr = alloca i32, align 4
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13 %j = alloca i32, align 4
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14 %nrvo = alloca i1
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15 %cleanup.dest.slot = alloca i32
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16 store i32 %i, i32* %i.addr, align 4
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17 call void @llvm.dbg.declare(metadata i32* %i.addr, metadata !26, metadata !{!"0x102"}), !dbg !27
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18 call void @llvm.dbg.declare(metadata i32* %j, metadata !28, metadata !{!"0x102"}), !dbg !30
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19 store i32 0, i32* %j, align 4, !dbg !31
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20 %tmp = load i32* %i.addr, align 4, !dbg !32
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21 %cmp = icmp eq i32 %tmp, 42, !dbg !32
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22 br i1 %cmp, label %if.then, label %if.end, !dbg !32
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23
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24 if.then: ; preds = %entry
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25 %tmp1 = load i32* %i.addr, align 4, !dbg !33
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26 %add = add nsw i32 %tmp1, 1, !dbg !33
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27 store i32 %add, i32* %j, align 4, !dbg !33
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28 br label %if.end, !dbg !35
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30 if.end: ; preds = %if.then, %entry
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31 store i1 false, i1* %nrvo, !dbg !36
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32 call void @llvm.dbg.declare(metadata %class.A* %agg.result, metadata !37, metadata !{!"0x102"}), !dbg !39
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33 %tmp2 = load i32* %j, align 4, !dbg !40
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34 %x = getelementptr inbounds %class.A* %agg.result, i32 0, i32 0, !dbg !40
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35 store i32 %tmp2, i32* %x, align 4, !dbg !40
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36 store i1 true, i1* %nrvo, !dbg !41
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37 store i32 1, i32* %cleanup.dest.slot
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38 %nrvo.val = load i1* %nrvo, !dbg !42
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39 br i1 %nrvo.val, label %nrvo.skipdtor, label %nrvo.unused, !dbg !42
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40
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41 nrvo.unused: ; preds = %if.end
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42 call void @_ZN1AD1Ev(%class.A* %agg.result), !dbg !42
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43 br label %nrvo.skipdtor, !dbg !42
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44
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45 nrvo.skipdtor: ; preds = %nrvo.unused, %if.end
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46 ret void, !dbg !42
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47 }
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48
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49 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
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50
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51 define linkonce_odr void @_ZN1AD1Ev(%class.A* %this) unnamed_addr ssp align 2 {
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52 entry:
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53 %this.addr = alloca %class.A*, align 8
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54 store %class.A* %this, %class.A** %this.addr, align 8
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55 call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !43, metadata !{!"0x102"}), !dbg !44
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56 %this1 = load %class.A** %this.addr
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57 call void @_ZN1AD2Ev(%class.A* %this1)
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58 ret void, !dbg !45
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59 }
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60
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61 define linkonce_odr void @_ZN1AD2Ev(%class.A* %this) unnamed_addr nounwind ssp align 2 {
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62 entry:
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63 %this.addr = alloca %class.A*, align 8
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64 store %class.A* %this, %class.A** %this.addr, align 8
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65 call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !46, metadata !{!"0x102"}), !dbg !47
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66 %this1 = load %class.A** %this.addr
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67 %x = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !48
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68 store i32 1, i32* %x, align 4, !dbg !48
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69 ret void, !dbg !48
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70 }
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71
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72 !llvm.dbg.cu = !{!2}
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73 !llvm.module.flags = !{!52}
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74
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75 !0 = !{!"0x2e\00~A\00~A\00\002\000\000\000\006\00256\000\000", !51, !1, !11, null, null, null, null, null} ; [ DW_TAG_subprogram ]
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76 !1 = !{!"0x2\00A\002\00128\0032\000\000\000", !51, !2, null, !4, null, null, null} ; [ DW_TAG_class_type ] [A] [line 2, size 128, align 32, offset 0] [def] [from ]
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77 !2 = !{!"0x11\004\00clang version 3.0 (trunk 130127)\000\00\000\00\001", !51, !24, !24, !50, null, null} ; [ DW_TAG_compile_unit ]
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78 !3 = !{!"0x29", !51} ; [ DW_TAG_file_type ]
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79 !4 = !{!5, !7, !8, !9, !0, !10, !14}
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80 !5 = !{!"0xd\00x\002\0032\0032\000\000", !51, !3, !6} ; [ DW_TAG_member ]
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81 !6 = !{!"0x24\00int\000\0032\0032\000\000\005", null, !2} ; [ DW_TAG_base_type ]
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82 !7 = !{!"0xd\00y\002\0032\0032\0032\000", !51, !3, !6} ; [ DW_TAG_member ]
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83 !8 = !{!"0xd\00z\002\0032\0032\0064\000", !51, !3, !6} ; [ DW_TAG_member ]
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84 !9 = !{!"0xd\00o\002\0032\0032\0096\000", !51, !3, !6} ; [ DW_TAG_member ]
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85 !10 = !{!"0x2e\00A\00A\00\002\000\000\000\006\00320\000\000", !51, !1, !11, null, null, null, null, null} ; [ DW_TAG_subprogram ]
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86 !11 = !{!"0x15\00\000\000\000\000\000\000", !51, !3, null, !12, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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87 !12 = !{null, !13}
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88 !13 = !{!"0xf\00\000\0064\0064\000\0064", !2, null, !1} ; [ DW_TAG_pointer_type ]
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89 !14 = !{!"0x2e\00A\00A\00\002\000\000\000\006\00320\000\000", !51, !1, !15, null, null, null, null, null} ; [ DW_TAG_subprogram ]
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90 !15 = !{!"0x15\00\000\000\000\000\000\000", !51, !3, null, !16, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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91 !16 = !{null, !13, !17}
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92 !17 = !{!"0x10\00\000\000\000\000\000", null, !2, !18} ; [ DW_TAG_reference_type ]
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93 !18 = !{!"0x26\00\000\000\000\000\000", !2, null, !1} ; [ DW_TAG_const_type ]
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94 !19 = !{!"0x2e\00foo\00foo\00_Z3fooi\004\000\001\000\006\00256\000\000", !51, !3, !20, null, void (%class.A*, i32)* @_Z3fooi, null, null, null} ; [ DW_TAG_subprogram ] [line 4] [def] [scope 0] [foo]
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95 !20 = !{!"0x15\00\000\000\000\000\000\000", !51, !3, null, !21, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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96 !21 = !{!1}
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97 !22 = !{!"0x2e\00~A\00~A\00_ZN1AD1Ev\002\000\001\000\006\00256\000\000", !51, !3, !23, null, void (%class.A*)* @_ZN1AD1Ev, null, null, null} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 0] [~A]
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98 !23 = !{!"0x15\00\000\000\000\000\000\000", !51, !3, null, !24, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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99 !24 = !{null}
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100 !25 = !{!"0x2e\00~A\00~A\00_ZN1AD2Ev\002\000\001\000\006\00256\000\000", !51, !3, !23, null, void (%class.A*)* @_ZN1AD2Ev, null, null, null} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 0] [~A]
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101 !26 = !{!"0x101\00i\0016777220\000", !19, !3, !6} ; [ DW_TAG_arg_variable ]
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102 !27 = !MDLocation(line: 4, column: 11, scope: !19)
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parents: 77
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103 !28 = !{!"0x100\00j\005\000", !29, !3, !6} ; [ DW_TAG_auto_variable ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
104 !29 = !{!"0xb\004\0014\000", !51, !19} ; [ DW_TAG_lexical_block ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
105 !30 = !MDLocation(line: 5, column: 7, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
106 !31 = !MDLocation(line: 5, column: 12, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
107 !32 = !MDLocation(line: 6, column: 3, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
108 !33 = !MDLocation(line: 7, column: 5, scope: !34)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
109 !34 = !{!"0xb\006\0016\001", !51, !29} ; [ DW_TAG_lexical_block ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
110 !35 = !MDLocation(line: 8, column: 3, scope: !34)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
111 !36 = !MDLocation(line: 9, column: 9, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
112 !37 = !{!"0x100\00my_a\009\000", !29, !3, !38} ; [ DW_TAG_auto_variable ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
113 !38 = !{!"0x10\00\000\000\000\000\000", !2, null, !1} ; [ DW_TAG_reference_type ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
114 !39 = !MDLocation(line: 9, column: 5, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
115 !40 = !MDLocation(line: 10, column: 3, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
116 !41 = !MDLocation(line: 11, column: 3, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
117 !42 = !MDLocation(line: 12, column: 1, scope: !29)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
118 !43 = !{!"0x101\00this\0016777218\0064", !22, !3, !13} ; [ DW_TAG_arg_variable ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
119 !44 = !MDLocation(line: 2, column: 47, scope: !22)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
120 !45 = !MDLocation(line: 2, column: 61, scope: !22)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
121 !46 = !{!"0x101\00this\0016777218\0064", !25, !3, !13} ; [ DW_TAG_arg_variable ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
122 !47 = !MDLocation(line: 2, column: 47, scope: !25)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
123 !48 = !MDLocation(line: 2, column: 54, scope: !49)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
124 !49 = !{!"0xb\002\0052\002", !51, !25} ; [ DW_TAG_lexical_block ]
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
125 !50 = !{!19, !22, !25}
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
126 !51 = !{!"a.cc", !"/private/tmp"}
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
127 !52 = !{i32 1, !"Debug Info Version", i32 2}