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221
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1 ; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs -asm-verbose=0 < %s | FileCheck --check-prefixes=GCN,GFX10,GFX10-ASM %s
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2 ; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s -filetype=obj | llvm-objdump -d --arch-name=amdgcn --mcpu=gfx1030 - | FileCheck --check-prefixes=GCN,GFX10,GFX10-DIS %s
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3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=GFX8 %s
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4
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5 ; GFX8-NOT: s_inst_prefetch
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6 ; GFX8-NOT: .palign 6
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7
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8 ; GCN-LABEL: test_loop_64
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9 ; GFX10: s_movk_i32 s{{[0-9]+}}, 0x400
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10 ; GFX10-DIS-NEXT: {{^$}}
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11 ; GFX10-ASM-NEXT: [[L1:BB[0-9_]+]]:
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12 ; GFX10-DIS-NEXT: <[[L1:BB[0-9_]+]]>:
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13 ; GFX10: s_sleep 0
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14 ; GFX10: s_cbranch_scc0 [[L1]]
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15 ; GFX10-NEXT: s_endpgm
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16 define amdgpu_kernel void @test_loop_64(i32 addrspace(1)* nocapture %arg) {
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17 bb:
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18 br label %bb2
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19
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20 bb1: ; preds = %bb2
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21 ret void
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22
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23 bb2: ; preds = %bb2, %bb
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24 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb2 ]
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25 %tmp2 = add nuw nsw i32 %tmp1, 1
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26 %tmp3 = icmp eq i32 %tmp2, 1024
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27 tail call void @llvm.amdgcn.s.sleep(i32 0)
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28 br i1 %tmp3, label %bb1, label %bb2
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29 }
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30
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31 ; GCN-LABEL: test_loop_128
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32 ; GFX10: s_movk_i32 s{{[0-9]+}}, 0x400
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33 ; GFX10-ASM-NEXT: .p2align 6
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34 ; GFX10-DIS-NEXT: s_nop 0
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35 ; GFX10-NOT: s_inst_prefetch
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36 ; GFX10-ASM: [[L1:BB[0-9_]+]]:
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37 ; GFX10-DIS: <[[L1:BB[0-9_]+]]>:
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38 ; GFX10: s_sleep 0
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39 ; GFX10: s_cbranch_scc0 [[L1]]
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40 ; GFX10-NEXT: s_endpgm
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41 define amdgpu_kernel void @test_loop_128(i32 addrspace(1)* nocapture %arg) {
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42 bb:
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43 br label %bb2
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44
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45 bb1: ; preds = %bb2
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46 ret void
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47
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48 bb2: ; preds = %bb2, %bb
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49 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb2 ]
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50 %tmp2 = add nuw nsw i32 %tmp1, 1
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51 %tmp3 = icmp eq i32 %tmp2, 1024
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52 tail call void @llvm.amdgcn.s.sleep(i32 0)
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53 tail call void @llvm.amdgcn.s.sleep(i32 0)
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54 tail call void @llvm.amdgcn.s.sleep(i32 0)
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55 tail call void @llvm.amdgcn.s.sleep(i32 0)
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56 tail call void @llvm.amdgcn.s.sleep(i32 0)
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57 tail call void @llvm.amdgcn.s.sleep(i32 0)
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58 tail call void @llvm.amdgcn.s.sleep(i32 0)
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59 tail call void @llvm.amdgcn.s.sleep(i32 0)
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60 tail call void @llvm.amdgcn.s.sleep(i32 0)
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61 tail call void @llvm.amdgcn.s.sleep(i32 0)
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62 tail call void @llvm.amdgcn.s.sleep(i32 0)
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63 tail call void @llvm.amdgcn.s.sleep(i32 0)
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64 tail call void @llvm.amdgcn.s.sleep(i32 0)
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65 tail call void @llvm.amdgcn.s.sleep(i32 0)
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66 tail call void @llvm.amdgcn.s.sleep(i32 0)
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67 tail call void @llvm.amdgcn.s.sleep(i32 0)
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68 br i1 %tmp3, label %bb1, label %bb2
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69 }
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70
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71 ; GCN-LABEL: test_loop_192
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72 ; GFX10: s_movk_i32 s{{[0-9]+}}, 0x400
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73 ; GFX10-NEXT: s_inst_prefetch 0x1
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74 ; GFX10-ASM-NEXT: .p2align 6
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75 ; GFX10-DIS-NEXT: s_nop 0
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76 ; GFX10-NOT: s_inst_prefetch
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77 ; GFX10-ASM: [[L1:BB[0-9_]+]]:
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78 ; GFX10-DIS: <[[L1:BB[0-9_]+]]>:
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79 ; GFX10: s_sleep 0
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80 ; GFX10: s_cbranch_scc0 [[L1]]
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81 ; GFX10-NEXT: s_inst_prefetch 0x2
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82 ; GFX10-NEXT: s_endpgm
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83 define amdgpu_kernel void @test_loop_192(i32 addrspace(1)* nocapture %arg) {
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84 bb:
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85 br label %bb2
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86
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87 bb1: ; preds = %bb2
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88 ret void
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89
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90 bb2: ; preds = %bb2, %bb
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91 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb2 ]
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92 %tmp2 = add nuw nsw i32 %tmp1, 1
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93 %tmp3 = icmp eq i32 %tmp2, 1024
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94 tail call void @llvm.amdgcn.s.sleep(i32 0)
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95 tail call void @llvm.amdgcn.s.sleep(i32 0)
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96 tail call void @llvm.amdgcn.s.sleep(i32 0)
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97 tail call void @llvm.amdgcn.s.sleep(i32 0)
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98 tail call void @llvm.amdgcn.s.sleep(i32 0)
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99 tail call void @llvm.amdgcn.s.sleep(i32 0)
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100 tail call void @llvm.amdgcn.s.sleep(i32 0)
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101 tail call void @llvm.amdgcn.s.sleep(i32 0)
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102 tail call void @llvm.amdgcn.s.sleep(i32 0)
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103 tail call void @llvm.amdgcn.s.sleep(i32 0)
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104 tail call void @llvm.amdgcn.s.sleep(i32 0)
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105 tail call void @llvm.amdgcn.s.sleep(i32 0)
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106 tail call void @llvm.amdgcn.s.sleep(i32 0)
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107 tail call void @llvm.amdgcn.s.sleep(i32 0)
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108 tail call void @llvm.amdgcn.s.sleep(i32 0)
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109 tail call void @llvm.amdgcn.s.sleep(i32 0)
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110 tail call void @llvm.amdgcn.s.sleep(i32 0)
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111 tail call void @llvm.amdgcn.s.sleep(i32 0)
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112 tail call void @llvm.amdgcn.s.sleep(i32 0)
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113 tail call void @llvm.amdgcn.s.sleep(i32 0)
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114 tail call void @llvm.amdgcn.s.sleep(i32 0)
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115 tail call void @llvm.amdgcn.s.sleep(i32 0)
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116 tail call void @llvm.amdgcn.s.sleep(i32 0)
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117 tail call void @llvm.amdgcn.s.sleep(i32 0)
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118 tail call void @llvm.amdgcn.s.sleep(i32 0)
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119 tail call void @llvm.amdgcn.s.sleep(i32 0)
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120 tail call void @llvm.amdgcn.s.sleep(i32 0)
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121 tail call void @llvm.amdgcn.s.sleep(i32 0)
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122 tail call void @llvm.amdgcn.s.sleep(i32 0)
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123 tail call void @llvm.amdgcn.s.sleep(i32 0)
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124 tail call void @llvm.amdgcn.s.sleep(i32 0)
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125 tail call void @llvm.amdgcn.s.sleep(i32 0)
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126 tail call void @llvm.amdgcn.s.sleep(i32 0)
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127 tail call void @llvm.amdgcn.s.sleep(i32 0)
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128 br i1 %tmp3, label %bb1, label %bb2
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129 }
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130
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131 ; GCN-LABEL: test_loop_256
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132 ; GFX10: s_movk_i32 s{{[0-9]+}}, 0x400
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133 ; GFX10-DIS-NEXT: {{^$}}
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134 ; GFX10-ASM-NEXT: [[L1:BB[0-9_]+]]:
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135 ; GFX10-DIS-NEXT: <[[L1:BB[0-9_]+]]>:
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136 ; GFX10: s_sleep 0
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137 ; GFX10: s_cbranch_scc0 [[L1]]
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138 ; GFX10-NEXT: s_endpgm
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139 define amdgpu_kernel void @test_loop_256(i32 addrspace(1)* nocapture %arg) {
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140 bb:
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141 br label %bb2
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142
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143 bb1: ; preds = %bb2
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144 ret void
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145
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146 bb2: ; preds = %bb2, %bb
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147 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb2 ]
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148 %tmp2 = add nuw nsw i32 %tmp1, 1
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149 %tmp3 = icmp eq i32 %tmp2, 1024
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150 tail call void @llvm.amdgcn.s.sleep(i32 0)
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151 tail call void @llvm.amdgcn.s.sleep(i32 0)
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152 tail call void @llvm.amdgcn.s.sleep(i32 0)
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153 tail call void @llvm.amdgcn.s.sleep(i32 0)
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154 tail call void @llvm.amdgcn.s.sleep(i32 0)
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155 tail call void @llvm.amdgcn.s.sleep(i32 0)
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156 tail call void @llvm.amdgcn.s.sleep(i32 0)
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157 tail call void @llvm.amdgcn.s.sleep(i32 0)
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158 tail call void @llvm.amdgcn.s.sleep(i32 0)
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159 tail call void @llvm.amdgcn.s.sleep(i32 0)
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160 tail call void @llvm.amdgcn.s.sleep(i32 0)
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161 tail call void @llvm.amdgcn.s.sleep(i32 0)
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162 tail call void @llvm.amdgcn.s.sleep(i32 0)
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163 tail call void @llvm.amdgcn.s.sleep(i32 0)
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164 tail call void @llvm.amdgcn.s.sleep(i32 0)
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165 tail call void @llvm.amdgcn.s.sleep(i32 0)
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166 tail call void @llvm.amdgcn.s.sleep(i32 0)
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167 tail call void @llvm.amdgcn.s.sleep(i32 0)
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168 tail call void @llvm.amdgcn.s.sleep(i32 0)
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169 tail call void @llvm.amdgcn.s.sleep(i32 0)
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170 tail call void @llvm.amdgcn.s.sleep(i32 0)
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171 tail call void @llvm.amdgcn.s.sleep(i32 0)
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172 tail call void @llvm.amdgcn.s.sleep(i32 0)
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173 tail call void @llvm.amdgcn.s.sleep(i32 0)
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174 tail call void @llvm.amdgcn.s.sleep(i32 0)
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175 tail call void @llvm.amdgcn.s.sleep(i32 0)
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176 tail call void @llvm.amdgcn.s.sleep(i32 0)
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177 tail call void @llvm.amdgcn.s.sleep(i32 0)
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178 tail call void @llvm.amdgcn.s.sleep(i32 0)
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179 tail call void @llvm.amdgcn.s.sleep(i32 0)
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180 tail call void @llvm.amdgcn.s.sleep(i32 0)
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181 tail call void @llvm.amdgcn.s.sleep(i32 0)
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182 tail call void @llvm.amdgcn.s.sleep(i32 0)
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183 tail call void @llvm.amdgcn.s.sleep(i32 0)
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184 tail call void @llvm.amdgcn.s.sleep(i32 0)
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185 tail call void @llvm.amdgcn.s.sleep(i32 0)
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186 tail call void @llvm.amdgcn.s.sleep(i32 0)
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187 tail call void @llvm.amdgcn.s.sleep(i32 0)
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188 tail call void @llvm.amdgcn.s.sleep(i32 0)
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189 tail call void @llvm.amdgcn.s.sleep(i32 0)
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190 tail call void @llvm.amdgcn.s.sleep(i32 0)
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191 tail call void @llvm.amdgcn.s.sleep(i32 0)
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192 tail call void @llvm.amdgcn.s.sleep(i32 0)
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193 tail call void @llvm.amdgcn.s.sleep(i32 0)
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194 tail call void @llvm.amdgcn.s.sleep(i32 0)
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195 tail call void @llvm.amdgcn.s.sleep(i32 0)
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196 tail call void @llvm.amdgcn.s.sleep(i32 0)
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197 tail call void @llvm.amdgcn.s.sleep(i32 0)
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198 tail call void @llvm.amdgcn.s.sleep(i32 0)
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199 tail call void @llvm.amdgcn.s.sleep(i32 0)
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200 br i1 %tmp3, label %bb1, label %bb2
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201 }
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202
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203 ; GCN-LABEL: test_loop_prefetch_inner_outer
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204 ; GFX10: s_inst_prefetch 0x1
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205 ; GFX10-ASM-NEXT: .p2align 6
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206 ; GFX10-DIS-NEXT: s_nop 0
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207 ; GFX10-NOT: s_inst_prefetch
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208 ; GFX10-ASM: [[L1:BB[0-9_]+]]:
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209 ; GFX10-DIS: <[[L1:BB[0-9_]+]]>:
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210 ; GFX10-NOT: s_inst_prefetch
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211 ; GFX10-ASM: .p2align 6
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212 ; GFX10-DIS: s_nop 0
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213 ; GFX10-NOT: s_inst_prefetch
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214 ; GFX10-ASM: [[L2:BB[0-9_]+]]:
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215 ; GFX10-DIS: <[[L2:BB[0-9_]+]]>:
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216 ; GFX10-NOT: s_inst_prefetch
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217 ; GFX10: s_sleep 0
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218 ; GFX10: s_cbranch_scc{{[01]}} [[L2]]
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219 ; GFX10-NOT: s_inst_prefetch
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220 ; GFX10: s_cbranch_scc{{[01]}} [[L1]]
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221 ; GFX10-NEXT: s_inst_prefetch 0x2
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222 ; GFX10-NEXT: s_endpgm
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223 define amdgpu_kernel void @test_loop_prefetch_inner_outer(i32 addrspace(1)* nocapture %arg) {
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224 bb:
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225 br label %bb2
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226
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227 bb1:
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228 ret void
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229
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230 bb2:
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231 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb4 ]
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232 %tmp2 = add nuw nsw i32 %tmp1, 1
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233 %tmp3 = icmp eq i32 %tmp2, 1024
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234 br label %bb3
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235
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236 bb3:
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237 %tmp4 = phi i32 [ 0, %bb2 ], [ %tmp5, %bb3 ]
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238 %tmp5 = add nuw nsw i32 %tmp4, 1
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239 %tmp6 = icmp eq i32 %tmp5, 1024
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240 tail call void @llvm.amdgcn.s.sleep(i32 0)
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241 tail call void @llvm.amdgcn.s.sleep(i32 0)
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242 tail call void @llvm.amdgcn.s.sleep(i32 0)
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243 tail call void @llvm.amdgcn.s.sleep(i32 0)
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244 tail call void @llvm.amdgcn.s.sleep(i32 0)
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245 tail call void @llvm.amdgcn.s.sleep(i32 0)
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246 tail call void @llvm.amdgcn.s.sleep(i32 0)
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247 tail call void @llvm.amdgcn.s.sleep(i32 0)
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248 tail call void @llvm.amdgcn.s.sleep(i32 0)
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249 tail call void @llvm.amdgcn.s.sleep(i32 0)
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250 tail call void @llvm.amdgcn.s.sleep(i32 0)
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251 tail call void @llvm.amdgcn.s.sleep(i32 0)
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252 tail call void @llvm.amdgcn.s.sleep(i32 0)
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253 tail call void @llvm.amdgcn.s.sleep(i32 0)
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254 tail call void @llvm.amdgcn.s.sleep(i32 0)
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255 tail call void @llvm.amdgcn.s.sleep(i32 0)
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256 tail call void @llvm.amdgcn.s.sleep(i32 0)
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257 tail call void @llvm.amdgcn.s.sleep(i32 0)
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258 tail call void @llvm.amdgcn.s.sleep(i32 0)
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259 tail call void @llvm.amdgcn.s.sleep(i32 0)
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260 tail call void @llvm.amdgcn.s.sleep(i32 0)
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261 tail call void @llvm.amdgcn.s.sleep(i32 0)
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262 tail call void @llvm.amdgcn.s.sleep(i32 0)
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263 tail call void @llvm.amdgcn.s.sleep(i32 0)
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264 tail call void @llvm.amdgcn.s.sleep(i32 0)
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265 tail call void @llvm.amdgcn.s.sleep(i32 0)
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266 tail call void @llvm.amdgcn.s.sleep(i32 0)
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267 tail call void @llvm.amdgcn.s.sleep(i32 0)
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268 tail call void @llvm.amdgcn.s.sleep(i32 0)
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269 tail call void @llvm.amdgcn.s.sleep(i32 0)
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270 tail call void @llvm.amdgcn.s.sleep(i32 0)
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271 tail call void @llvm.amdgcn.s.sleep(i32 0)
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272 tail call void @llvm.amdgcn.s.sleep(i32 0)
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273 tail call void @llvm.amdgcn.s.sleep(i32 0)
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274 br i1 %tmp6, label %bb4, label %bb3
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275
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276 bb4:
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277 br i1 %tmp3, label %bb1, label %bb2
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278 }
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279
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280 ; GCN-LABEL: test_loop_prefetch_inner_outer_noouter
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281 ; GFX10-NOT: .p2align 6
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282 ; GFX10-NOT: s_nop
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283 ; GFX10-NOT: s_inst_prefetch
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284 ; GFX10-ASM: [[L0:BB[0-9_]+]]:
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285 ; GFX10-DIS: <[[L0:BB[0-9_]+]]>:
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286 ; GFX10: s_inst_prefetch 0x1
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287 ; GFX10-ASM-NEXT: .p2align 6
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288 ; GFX10-DIS-NEXT: s_nop 0
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289 ; GFX10-NOT: s_inst_prefetch
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290 ; GFX10-ASM: [[L1:BB[0-9_]+]]:
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291 ; GFX10-DIS: <[[L1:BB[0-9_]+]]>:
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292 ; GFX10-NOT: s_inst_prefetch
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293 ; GFX10-ASM: .p2align 6
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294 ; GFX10-DIS: s_nop 0
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295 ; GFX10-NOT: s_inst_prefetch
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296 ; GFX10-ASM: [[L2:BB[0-9_]+]]:
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297 ; GFX10-DIS: <[[L2:BB[0-9_]+]]>:
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298 ; GFX10-NOT: s_inst_prefetch
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299 ; GFX10: s_sleep 0
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300 ; GFX10: s_cbranch_scc{{[01]}} [[L2]]
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301 ; GFX10-NOT: s_inst_prefetch
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302 ; GFX10: s_cbranch_scc{{[01]}} [[L1]]
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303 ; GFX10-NEXT: s_inst_prefetch 0x2
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304 ; GFX10: s_cbranch_scc{{[01]}} [[L0]]
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305 ; GFX10-NEXT: s_endpgm
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306 define amdgpu_kernel void @test_loop_prefetch_inner_outer_noouter(i32 addrspace(1)* nocapture %arg) {
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307 bb:
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308 br label %bb2
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309
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310 bb1:
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311 ret void
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312
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313 bb2:
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314 %tmp1 = phi i32 [ 0, %bb ], [ %tmp2, %bb6 ]
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315 %tmp2 = add nuw nsw i32 %tmp1, 1
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316 %tmp3 = icmp eq i32 %tmp2, 1024
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317 br label %bb3
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318
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319 bb3:
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320 %tmp4 = phi i32 [ 0, %bb2 ], [ %tmp5, %bb5 ]
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321 %tmp5 = add nuw nsw i32 %tmp4, 1
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322 %tmp6 = icmp eq i32 %tmp5, 1024
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323 br label %bb4
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324
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325 bb4:
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326 %tmp7 = phi i32 [ 0, %bb3 ], [ %tmp8, %bb4 ]
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327 %tmp8 = add nuw nsw i32 %tmp7, 1
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328 %tmp9 = icmp eq i32 %tmp8, 1024
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329 tail call void @llvm.amdgcn.s.sleep(i32 0)
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330 tail call void @llvm.amdgcn.s.sleep(i32 0)
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331 tail call void @llvm.amdgcn.s.sleep(i32 0)
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332 tail call void @llvm.amdgcn.s.sleep(i32 0)
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333 tail call void @llvm.amdgcn.s.sleep(i32 0)
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334 tail call void @llvm.amdgcn.s.sleep(i32 0)
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335 tail call void @llvm.amdgcn.s.sleep(i32 0)
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336 tail call void @llvm.amdgcn.s.sleep(i32 0)
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337 tail call void @llvm.amdgcn.s.sleep(i32 0)
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338 tail call void @llvm.amdgcn.s.sleep(i32 0)
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339 tail call void @llvm.amdgcn.s.sleep(i32 0)
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340 tail call void @llvm.amdgcn.s.sleep(i32 0)
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341 tail call void @llvm.amdgcn.s.sleep(i32 0)
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342 tail call void @llvm.amdgcn.s.sleep(i32 0)
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343 tail call void @llvm.amdgcn.s.sleep(i32 0)
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344 tail call void @llvm.amdgcn.s.sleep(i32 0)
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345 tail call void @llvm.amdgcn.s.sleep(i32 0)
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346 tail call void @llvm.amdgcn.s.sleep(i32 0)
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347 tail call void @llvm.amdgcn.s.sleep(i32 0)
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348 tail call void @llvm.amdgcn.s.sleep(i32 0)
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349 tail call void @llvm.amdgcn.s.sleep(i32 0)
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350 tail call void @llvm.amdgcn.s.sleep(i32 0)
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351 tail call void @llvm.amdgcn.s.sleep(i32 0)
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352 tail call void @llvm.amdgcn.s.sleep(i32 0)
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353 tail call void @llvm.amdgcn.s.sleep(i32 0)
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354 tail call void @llvm.amdgcn.s.sleep(i32 0)
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355 tail call void @llvm.amdgcn.s.sleep(i32 0)
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356 tail call void @llvm.amdgcn.s.sleep(i32 0)
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357 tail call void @llvm.amdgcn.s.sleep(i32 0)
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358 tail call void @llvm.amdgcn.s.sleep(i32 0)
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359 tail call void @llvm.amdgcn.s.sleep(i32 0)
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360 tail call void @llvm.amdgcn.s.sleep(i32 0)
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361 tail call void @llvm.amdgcn.s.sleep(i32 0)
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362 tail call void @llvm.amdgcn.s.sleep(i32 0)
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363 br i1 %tmp9, label %bb5, label %bb4
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364
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365 bb5:
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366 br i1 %tmp6, label %bb6, label %bb3
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367
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368 bb6:
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369 tail call void @llvm.amdgcn.s.sleep(i32 0)
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370 tail call void @llvm.amdgcn.s.sleep(i32 0)
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371 tail call void @llvm.amdgcn.s.sleep(i32 0)
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372 tail call void @llvm.amdgcn.s.sleep(i32 0)
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373 tail call void @llvm.amdgcn.s.sleep(i32 0)
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374 tail call void @llvm.amdgcn.s.sleep(i32 0)
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375 tail call void @llvm.amdgcn.s.sleep(i32 0)
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376 tail call void @llvm.amdgcn.s.sleep(i32 0)
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377 tail call void @llvm.amdgcn.s.sleep(i32 0)
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378 tail call void @llvm.amdgcn.s.sleep(i32 0)
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379 tail call void @llvm.amdgcn.s.sleep(i32 0)
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380 tail call void @llvm.amdgcn.s.sleep(i32 0)
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381 tail call void @llvm.amdgcn.s.sleep(i32 0)
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382 tail call void @llvm.amdgcn.s.sleep(i32 0)
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383 tail call void @llvm.amdgcn.s.sleep(i32 0)
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384 tail call void @llvm.amdgcn.s.sleep(i32 0)
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385 br i1 %tmp3, label %bb1, label %bb2
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386 }
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387
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388 declare void @llvm.amdgcn.s.sleep(i32)
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