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1 # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s
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2 ---
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3 # GCN_LABEL: phi_moveimm_input
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4 # GCN-NOT: %{{[0-9]+}}:vgpr_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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5 # GCN: %{{[0-9]+}}:sreg_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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6
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7 name: phi_moveimm_input
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8 tracksRegLiveness: true
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9 body: |
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10 bb.0:
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11 successors: %bb.1
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12 liveins: $sgpr0, $sgpr1
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13
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14 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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15
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16 %4:sreg_32 = COPY $sgpr0
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17 %5:sreg_32 = COPY $sgpr1
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18
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19 bb.1:
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20 successors: %bb.2
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21 %2:sreg_32 = S_ADD_U32 %4, %5, implicit-def $scc
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22 S_BRANCH %bb.2
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23
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24 bb.2:
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25 successors: %bb.3
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26 %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
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27 S_BRANCH %bb.3
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28
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29 bb.3:
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30 successors: %bb.2
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31 %1:sreg_32 = COPY %0
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32 S_BRANCH %bb.2
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33 ...
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34
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35 ---
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36 # GCN_LABEL: phi_moveimm_subreg_input
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37 # GCN-NOT: %{{[0-9]+}}:sreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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38 # GCN: %{{[0-9]+}}:vreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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39 name: phi_moveimm_subreg_input
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40 tracksRegLiveness: true
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41 body: |
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42 bb.0:
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43 successors: %bb.1
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44 liveins: $sgpr0, $sgpr1
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45
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46 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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47
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48 %4:sreg_32 = COPY $sgpr0
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49 %5:sreg_32 = COPY $sgpr1
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50
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51 bb.1:
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52 successors: %bb.2
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53 undef %2.sub0:sreg_64 = S_ADD_U32 %4, %5, implicit-def $scc
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54 S_BRANCH %bb.2
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55
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56 bb.2:
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57 successors: %bb.3
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58 %3:sreg_64 = PHI %1, %bb.3, %2, %bb.1
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59 S_BRANCH %bb.3
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60
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61 bb.3:
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62 successors: %bb.2
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63 undef %1.sub0:sreg_64 = COPY %0
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64 S_BRANCH %bb.2
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65 ...
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66
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67
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68 ---
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69 # GCN_LABEL: phi_moveimm_bad_opcode_input
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70 # GCN-NOT: %{{[0-9]+}}:sreg_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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71 # GCN: %{{[0-9]+}}:vgpr_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
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72 name: phi_moveimm_bad_opcode_input
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73 tracksRegLiveness: true
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74 body: |
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75 bb.0:
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76 successors: %bb.1
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77 liveins: $sgpr0, $sgpr1, $vgpr0
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78 %6:vgpr_32 = COPY $vgpr0
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79 %0:vgpr_32 = V_MOV_B32_sdwa 0, %6:vgpr_32, 0, 5, 2, 4, implicit $exec, implicit %6:vgpr_32(tied-def 0)
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80
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81 %4:sreg_32 = COPY $sgpr0
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82 %5:sreg_32 = COPY $sgpr1
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83
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84 bb.1:
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85
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86 successors: %bb.2
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87 %2:sreg_32 = S_ADD_U32 %4, %5, implicit-def $scc
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88 S_BRANCH %bb.2
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89 bb.2:
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90 successors: %bb.3
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91 %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
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92 S_BRANCH %bb.3
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93 bb.3:
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94 successors: %bb.2
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95 %1:sreg_32 = COPY %0
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96 S_BRANCH %bb.2
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97 ...
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