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221
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GCN %s
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2
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3 ; GCN-LABEL: {{^}}shl_base_atomicrmw_global_ptr:
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4 ; GCN: v_add_co_u32_e32 v[[EXTRA_LO:[0-9]+]], vcc, 0x80, v4
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5 ; GCN: v_addc_co_u32_e32 v[[EXTRA_HI:[0-9]+]], vcc, 0, v5, vcc
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6 ; GCN: v_lshlrev_b64 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}, 2, v[4:5]
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7 ; GCN: v_mov_b32_e32 [[THREE:v[0-9]+]], 3
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8 ; GCN: global_atomic_and v{{\[}}[[LO]]:[[HI]]{{\]}}, [[THREE]], off offset:512
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9 ; GCN: global_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[EXTRA_LO]]:[[EXTRA_HI]]{{\]}}
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10 define void @shl_base_atomicrmw_global_ptr(i32 addrspace(1)* %out, i64 addrspace(1)* %extra.use, [512 x i32] addrspace(1)* %ptr) #0 {
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11 %arrayidx0 = getelementptr inbounds [512 x i32], [512 x i32] addrspace(1)* %ptr, i64 0, i64 32
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12 %cast = ptrtoint i32 addrspace(1)* %arrayidx0 to i64
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13 %shl = shl i64 %cast, 2
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14 %castback = inttoptr i64 %shl to i32 addrspace(1)*
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15 %val = atomicrmw and i32 addrspace(1)* %castback, i32 3 seq_cst
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16 store volatile i64 %cast, i64 addrspace(1)* %extra.use, align 4
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17 ret void
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18 }
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19
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20 ; GCN-LABEL: {{^}}shl_base_global_ptr_global_atomic_fadd:
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21 ; GCN: v_add_co_u32_e32 v[[EXTRA_LO:[0-9]+]], vcc, 0x80, v4
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22 ; GCN: v_addc_co_u32_e32 v[[EXTRA_HI:[0-9]+]], vcc, 0, v5, vcc
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23 ; GCN: v_lshlrev_b64 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}, 2, v[4:5]
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24 ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x42c80000
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25 ; GCN: global_atomic_add_f32 v{{\[}}[[LO]]:[[HI]]{{\]}}, [[K]], off offset:512
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26 ; GCN: global_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[EXTRA_LO]]:[[EXTRA_HI]]{{\]}}
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27 define void @shl_base_global_ptr_global_atomic_fadd(i32 addrspace(1)* %out, i64 addrspace(1)* %extra.use, [512 x i32] addrspace(1)* %ptr) #0 {
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28 %arrayidx0 = getelementptr inbounds [512 x i32], [512 x i32] addrspace(1)* %ptr, i64 0, i64 32
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29 %cast = ptrtoint i32 addrspace(1)* %arrayidx0 to i64
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30 %shl = shl i64 %cast, 2
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31 %castback = inttoptr i64 %shl to float addrspace(1)*
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32 call float @llvm.amdgcn.global.atomic.fadd.f32.p1f32.f32(float addrspace(1)* %castback, float 100.0)
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33 store volatile i64 %cast, i64 addrspace(1)* %extra.use, align 4
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34 ret void
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35 }
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36
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37 declare float @llvm.amdgcn.global.atomic.fadd.f32.p1f32.f32(float addrspace(1)* nocapture, float) #1
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38
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39 attributes #0 = { nounwind }
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40 attributes #1 = { argmemonly nounwind willreturn }
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