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83
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1 ; RUN: llc -march=x86-64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-64
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2 ; RUN: llc -march=x86 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-32
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3 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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4 target triple = "x86_64-apple-macosx10.10.0"
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5
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6 define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
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7 ; CHECK-LABEL: test_udivrem_zext_ah
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8 ; CHECK: divb
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9 ; CHECK: movzbl %ah, [[REG_REM:%[a-z0-9]+]]
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10 ; CHECK: movb %al, ([[REG_ZPTR:%[a-z0-9]+]])
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11 ; CHECK: movl [[REG_REM]], %eax
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12 ; CHECK: ret
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13 %div = udiv i8 %x, %y
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14 store i8 %div, i8* @z
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15 %1 = urem i8 %x, %y
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16 ret i8 %1
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17 }
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18
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19 define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
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20 ; CHECK-LABEL: test_urem_zext_ah
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21 ; CHECK: divb
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22 ; CHECK: movzbl %ah, %eax
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23 ; CHECK: ret
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24 %1 = urem i8 %x, %y
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25 ret i8 %1
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26 }
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27
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28 define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
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29 ; CHECK-LABEL: test_urem_noext_ah
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30 ; CHECK: divb [[REG_X:%[a-z0-9]+]]
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31 ; CHECK: movzbl %ah, %eax
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32 ; CHECK: addb [[REG_X]], %al
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33 ; CHECK: ret
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34 %1 = urem i8 %x, %y
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35 %2 = add i8 %1, %y
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36 ret i8 %2
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37 }
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38
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39 define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
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40 ; CHECK-LABEL: test_urem_zext64_ah
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41 ; CHECK: divb
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42 ; CHECK: movzbl %ah, %eax
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43 ; CHECK-32: xorl %edx, %edx
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44 ; CHECK: ret
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45 %1 = urem i8 %x, %y
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46 %2 = zext i8 %1 to i64
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47 ret i64 %2
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48 }
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49
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50 define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
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51 ; CHECK-LABEL: test_sdivrem_sext_ah
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52 ; CHECK: cbtw
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53 ; CHECK: idivb
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54 ; CHECK: movsbl %ah, [[REG_REM:%[a-z0-9]+]]
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55 ; CHECK: movb %al, ([[REG_ZPTR]])
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56 ; CHECK: movl [[REG_REM]], %eax
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57 ; CHECK: ret
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58 %div = sdiv i8 %x, %y
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59 store i8 %div, i8* @z
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60 %1 = srem i8 %x, %y
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61 ret i8 %1
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62 }
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63
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64 define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
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65 ; CHECK-LABEL: test_srem_sext_ah
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66 ; CHECK: cbtw
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67 ; CHECK: idivb
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68 ; CHECK: movsbl %ah, %eax
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69 ; CHECK: ret
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70 %1 = srem i8 %x, %y
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71 ret i8 %1
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72 }
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73
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74 define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
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75 ; CHECK-LABEL: test_srem_noext_ah
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76 ; CHECK: cbtw
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77 ; CHECK: idivb [[REG_X:%[a-z0-9]+]]
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78 ; CHECK: movsbl %ah, %eax
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79 ; CHECK: addb [[REG_X]], %al
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80 ; CHECK: ret
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81 %1 = srem i8 %x, %y
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82 %2 = add i8 %1, %y
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83 ret i8 %2
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84 }
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85
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86 define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
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87 ; CHECK-LABEL: test_srem_sext64_ah
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88 ; CHECK: cbtw
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89 ; CHECK: idivb
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90 ; CHECK: movsbl %ah, %eax
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91 ; CHECK-32: movl %eax, %edx
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92 ; CHECK-32: sarl $31, %edx
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93 ; CHECK-64: movsbq %al, %rax
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94 ; CHECK: ret
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95 %1 = srem i8 %x, %y
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96 %2 = sext i8 %1 to i64
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97 ret i64 %2
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98 }
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99
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100 @z = external global i8
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