CbC/CbC_llvm: docs/MIRLangRef.rst annotate

annotate docs/MIRLangRef.rst @ 148:63bd29f05246

merged

author	Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date	Wed, 14 Aug 2019 19:46:37 +0900
parents	c2174574ed3a
children

rev	line source
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	1 ========================================
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	2 Machine IR (MIR) Format Reference Manual
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	3 ========================================
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	4
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	5 .. contents::
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	6 :local:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	7
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	8 .. warning::
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	9 This is a work in progress.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	10
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	11 Introduction
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	12 ============
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	13
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	14 This document is a reference manual for the Machine IR (MIR) serialization
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	15 format. MIR is a human readable serialization format that is used to represent
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	16 LLVM's :ref:`machine specific intermediate representation
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	17 <machine code representation>`.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	18
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	19 The MIR serialization format is designed to be used for testing the code
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	20 generation passes in LLVM.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	21
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	22 Overview
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	23 ========
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	24
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	25 The MIR serialization format uses a YAML container. YAML is a standard
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	26 data serialization language, and the full YAML language spec can be read at
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	27 `yaml.org
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	28 <http://www.yaml.org/spec/1.2/spec.html#Introduction>`_.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	29
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	30 A MIR file is split up into a series of `YAML documents`_. The first document
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	31 can contain an optional embedded LLVM IR module, and the rest of the documents
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	32 contain the serialized machine functions.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	33
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	34 .. _YAML documents: http://www.yaml.org/spec/1.2/spec.html#id2800132
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	35
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	36 MIR Testing Guide
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	37 =================
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	38
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	39 You can use the MIR format for testing in two different ways:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	40
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	41 - You can write MIR tests that invoke a single code generation pass using the
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	42 ``-run-pass`` option in llc.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	43
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	44 - You can use llc's ``-stop-after`` option with existing or new LLVM assembly
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	45 tests and check the MIR output of a specific code generation pass.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	46
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	47 Testing Individual Code Generation Passes
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	48 -----------------------------------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	49
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	50 The ``-run-pass`` option in llc allows you to create MIR tests that invoke just
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	51 a single code generation pass. When this option is used, llc will parse an
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	52 input MIR file, run the specified code generation pass(es), and output the
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	53 resulting MIR code.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	54
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	55 You can generate an input MIR file for the test by using the ``-stop-after`` or
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	56 ``-stop-before`` option in llc. For example, if you would like to write a test
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	57 for the post register allocation pseudo instruction expansion pass, you can
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	58 specify the machine copy propagation pass in the ``-stop-after`` option, as it
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	59 runs just before the pass that we are trying to test:
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	60
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	61 ``llc -stop-after=machine-cp bug-trigger.ll > test.mir``
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	62
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	63 If the same pass is run multiple times, a run index can be included
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	64 after the name with a comma.
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	65
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	66 ``llc -stop-after=dead-mi-elimination,1 bug-trigger.ll > test.mir``
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	67
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	68 After generating the input MIR file, you'll have to add a run line that uses
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	69 the ``-run-pass`` option to it. In order to test the post register allocation
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	70 pseudo instruction expansion pass on X86-64, a run line like the one shown
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	71 below can be used:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	72
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	73 ``# RUN: llc -o - %s -mtriple=x86_64-- -run-pass=postrapseudos \| FileCheck %s``
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	74
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	75 The MIR files are target dependent, so they have to be placed in the target
121 803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	76 specific test directories (``lib/CodeGen/TARGETNAME``). They also need to
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	77 specify a target triple or a target architecture either in the run line or in
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	78 the embedded LLVM IR module.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	79
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	80 Simplifying MIR files
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	81 ^^^^^^^^^^^^^^^^^^^^^
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	82
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	83 The MIR code coming out of ``-stop-after``/``-stop-before`` is very verbose;
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	84 Tests are more accessible and future proof when simplified:
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	85
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	86 - Use the ``-simplify-mir`` option with llc.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	87
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	88 - Machine function attributes often have default values or the test works just
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	89 as well with default values. Typical candidates for this are: `alignment:`,
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	90 `exposesReturnsTwice`, `legalized`, `regBankSelected`, `selected`.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	91 The whole `frameInfo` section is often unnecessary if there is no special
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	92 frame usage in the function. `tracksRegLiveness` on the other hand is often
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	93 necessary for some passes that care about block livein lists.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	94
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	95 - The (global) `liveins:` list is typically only interesting for early
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	96 instruction selection passes and can be removed when testing later passes.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	97 The per-block `liveins:` on the other hand are necessary if
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	98 `tracksRegLiveness` is true.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	99
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	100 - Branch probability data in block `successors:` lists can be dropped if the
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	101 test doesn't depend on it. Example:
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	102 `successors: %bb.1(0x40000000), %bb.2(0x40000000)` can be replaced with
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	103 `successors: %bb.1, %bb.2`.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	104
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	105 - MIR code contains a whole IR module. This is necessary because there are
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	106 no equivalents in MIR for global variables, references to external functions,
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	107 function attributes, metadata, debug info. Instead some MIR data references
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	108 the IR constructs. You can often remove them if the test doesn't depend on
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	109 them.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	110
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	111 - Alias Analysis is performed on IR values. These are referenced by memory
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	112 operands in MIR. Example: `:: (load 8 from %ir.foobar, !alias.scope !9)`.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	113 If the test doesn't depend on (good) alias analysis the references can be
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	114 dropped: `:: (load 8)`
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	115
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	116 - MIR blocks can reference IR blocks for debug printing, profile information
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	117 or debug locations. Example: `bb.42.myblock` in MIR references the IR block
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	118 `myblock`. It is usually possible to drop the `.myblock` reference and simply
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	119 use `bb.42`.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	120
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	121 - If there are no memory operands or blocks referencing the IR then the
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	122 IR function can be replaced by a parameterless dummy function like
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	123 `define @func() { ret void }`.
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	124
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	125 - It is possible to drop the whole IR section of the MIR file if it only
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	126 contains dummy functions (see above). The .mir loader will create the
803732b1fca8 LLVM 5.0 kono parents: 120 diff changeset	127 IR functions automatically in this case.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	128
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	129 .. _limitations:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	130
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	131 Limitations
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	132 -----------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	133
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	134 Currently the MIR format has several limitations in terms of which state it
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	135 can serialize:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	136
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	137 - The target-specific state in the target-specific ``MachineFunctionInfo``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	138 subclasses isn't serialized at the moment.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	139
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	140 - The target-specific ``MachineConstantPoolValue`` subclasses (in the ARM and
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	141 SystemZ backends) aren't serialized at the moment.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	142
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	143 - The ``MCSymbol`` machine operands don't support temporary or local symbols.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	144
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	145 - A lot of the state in ``MachineModuleInfo`` isn't serialized - only the CFI
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	146 instructions and the variable debug information from MMI is serialized right
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	147 now.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	148
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	149 These limitations impose restrictions on what you can test with the MIR format.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	150 For now, tests that would like to test some behaviour that depends on the state
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	151 of temporary or local ``MCSymbol`` operands or the exception handling state in
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	152 MMI, can't use the MIR format. As well as that, tests that test some behaviour
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	153 that depends on the state of the target specific ``MachineFunctionInfo`` or
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	154 ``MachineConstantPoolValue`` subclasses can't use the MIR format at the moment.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	155
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	156 High Level Structure
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	157 ====================
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	158
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	159 .. _embedded-module:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	160
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	161 Embedded Module
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	162 ---------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	163
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	164 When the first YAML document contains a `YAML block literal string`_, the MIR
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	165 parser will treat this string as an LLVM assembly language string that
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	166 represents an embedded LLVM IR module.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	167 Here is an example of a YAML document that contains an LLVM module:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	168
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	169 .. code-block:: llvm
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	170
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	171 define i32 @inc(i32* %x) {
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	172 entry:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	173 %0 = load i32, i32* %x
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	174 %1 = add i32 %0, 1
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	175 store i32 %1, i32* %x
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	176 ret i32 %1
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	177 }
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	178
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	179 .. _YAML block literal string: http://www.yaml.org/spec/1.2/spec.html#id2795688
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	180
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	181 Machine Functions
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	182 -----------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	183
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	184 The remaining YAML documents contain the machine functions. This is an example
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	185 of such YAML document:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	186
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	187 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	188
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	189 ---
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	190 name: inc
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	191 tracksRegLiveness: true
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	192 liveins:
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	193 - { reg: '$rdi' }
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	194 callSites:
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	195 - { bb: 0, offset: 3, fwdArgRegs:
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	196 - { arg: 0, reg: '$edi' } }
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	197 body: \|
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	198 bb.0.entry:
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	199 liveins: $rdi
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	200
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	201 $eax = MOV32rm $rdi, 1, _, 0, _
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	202 $eax = INC32r killed $eax, implicit-def dead $eflags
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	203 MOV32mr killed $rdi, 1, _, 0, _, $eax
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	204 CALL64pcrel32 @foo <regmask...>
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	205 RETQ $eax
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	206 ...
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	207
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	208 The document above consists of attributes that represent the various
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	209 properties and data structures in a machine function.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	210
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	211 The attribute ``name`` is required, and its value should be identical to the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	212 name of a function that this machine function is based on.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	213
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	214 The attribute ``body`` is a `YAML block literal string`_. Its value represents
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	215 the function's machine basic blocks and their machine instructions.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	216
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	217 The attribute ``callSites`` is a representation of call site information which
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	218 keeps track of call instructions and registers used to transfer call arguments.
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	219
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	220 Machine Instructions Format Reference
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	221 =====================================
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	222
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	223 The machine basic blocks and their instructions are represented using a custom,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	224 human readable serialization language. This language is used in the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	225 `YAML block literal string`_ that corresponds to the machine function's body.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	226
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	227 A source string that uses this language contains a list of machine basic
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	228 blocks, which are described in the section below.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	229
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	230 Machine Basic Blocks
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	231 --------------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	232
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	233 A machine basic block is defined in a single block definition source construct
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	234 that contains the block's ID.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	235 The example below defines two blocks that have an ID of zero and one:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	236
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	237 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	238
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	239 bb.0:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	240 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	241 bb.1:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	242 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	243
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	244 A machine basic block can also have a name. It should be specified after the ID
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	245 in the block's definition:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	246
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	247 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	248
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	249 bb.0.entry: ; This block's name is "entry"
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	250 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	251
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	252 The block's name should be identical to the name of the IR block that this
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	253 machine block is based on.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	254
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	255 .. _block-references:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	256
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	257 Block References
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	258 ^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	259
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	260 The machine basic blocks are identified by their ID numbers. Individual
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	261 blocks are referenced using the following syntax:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	262
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	263 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	264
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	265 %bb.<id>
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	266
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	267 Example:
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	268
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	269 .. code-block:: llvm
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	270
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	271 %bb.0
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	272
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	273 The following syntax is also supported, but the former syntax is preferred for
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	274 block references:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	275
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	276 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	277
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	278 %bb.<id>[.<name>]
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	279
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	280 Example:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	281
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	282 .. code-block:: llvm
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	283
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	284 %bb.1.then
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	285
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	286 Successors
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	287 ^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	288
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	289 The machine basic block's successors have to be specified before any of the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	290 instructions:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	291
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	292 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	293
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	294 bb.0.entry:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	295 successors: %bb.1.then, %bb.2.else
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	296 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	297 bb.1.then:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	298 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	299 bb.2.else:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	300 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	301
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	302 The branch weights can be specified in brackets after the successor blocks.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	303 The example below defines a block that has two successors with branch weights
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	304 of 32 and 16:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	305
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	306 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	307
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	308 bb.0.entry:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	309 successors: %bb.1.then(32), %bb.2.else(16)
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	310
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	311 .. _bb-liveins:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	312
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	313 Live In Registers
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	314 ^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	315
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	316 The machine basic block's live in registers have to be specified before any of
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	317 the instructions:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	318
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	319 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	320
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	321 bb.0.entry:
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	322 liveins: $edi, $esi
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	323
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	324 The list of live in registers and successors can be empty. The language also
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	325 allows multiple live in register and successor lists - they are combined into
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	326 one list by the parser.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	327
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	328 Miscellaneous Attributes
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	329 ^^^^^^^^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	330
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	331 The attributes ``IsAddressTaken``, ``IsLandingPad`` and ``Alignment`` can be
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	332 specified in brackets after the block's definition:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	333
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	334 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	335
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	336 bb.0.entry (address-taken):
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	337 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	338 bb.2.else (align 4):
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	339 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	340 bb.3(landing-pad, align 4):
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	341 <instructions>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	342
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	343 .. TODO: Describe the way the reference to an unnamed LLVM IR block can be
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	344 preserved.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	345
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	346 Machine Instructions
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	347 --------------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	348
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	349 A machine instruction is composed of a name,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	350 :ref:`machine operands <machine-operands>`,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	351 :ref:`instruction flags <instruction-flags>`, and machine memory operands.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	352
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	353 The instruction's name is usually specified before the operands. The example
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	354 below shows an instance of the X86 ``RETQ`` instruction with a single machine
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	355 operand:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	356
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	357 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	358
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	359 RETQ $eax
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	360
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	361 However, if the machine instruction has one or more explicitly defined register
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	362 operands, the instruction's name has to be specified after them. The example
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	363 below shows an instance of the AArch64 ``LDPXpost`` instruction with three
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	364 defined register operands:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	365
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	366 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	367
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	368 $sp, $fp, $lr = LDPXpost $sp, 2
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	369
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	370 The instruction names are serialized using the exact definitions from the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	371 target's ``*InstrInfo.td`` files, and they are case sensitive. This means that
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	372 similar instruction names like ``TSTri`` and ``tSTRi`` represent different
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	373 machine instructions.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	374
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	375 .. _instruction-flags:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	376
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	377 Instruction Flags
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	378 ^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	379
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	380 The flag ``frame-setup`` or ``frame-destroy`` can be specified before the
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	381 instruction's name:
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	382
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	383 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	384
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	385 $fp = frame-setup ADDXri $sp, 0, 0
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	386
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	387 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	388
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	389 $x21, $x20 = frame-destroy LDPXi $sp
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	390
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	391 .. _registers:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	392
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	393 Bundled Instructions
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	394 ^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	395
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	396 The syntax for bundled instructions is the following:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	397
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	398 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	399
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	400 BUNDLE implicit-def $r0, implicit-def $r1, implicit $r2 {
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	401 $r0 = SOME_OP $r2
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	402 $r1 = ANOTHER_OP internal $r0
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	403 }
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	404
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	405 The first instruction is often a bundle header. The instructions between ``{``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	406 and ``}`` are bundled with the first instruction.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	407
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	408 Registers
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	409 ---------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	410
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	411 Registers are one of the key primitives in the machine instructions
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	412 serialization language. They are primarily used in the
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	413 :ref:`register machine operands <register-operands>`,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	414 but they can also be used in a number of other places, like the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	415 :ref:`basic block's live in list <bb-liveins>`.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	416
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	417 The physical registers are identified by their name and by the '$' prefix sigil.
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	418 They use the following syntax:
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	419
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	420 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	421
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	422 $<name>
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	423
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	424 The example below shows three X86 physical registers:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	425
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	426 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	427
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	428 $eax
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	429 $r15
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	430 $eflags
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	431
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	432 The virtual registers are identified by their ID number and by the '%' sigil.
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	433 They use the following syntax:
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	434
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	435 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	436
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	437 %<id>
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	438
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	439 Example:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	440
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	441 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	442
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	443 %0
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	444
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	445 The null registers are represented using an underscore ('``_``'). They can also be
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	446 represented using a '``$noreg``' named register, although the former syntax
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	447 is preferred.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	448
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	449 .. _machine-operands:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	450
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	451 Machine Operands
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	452 ----------------
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	453
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	454 There are seventeen different kinds of machine operands, and all of them can be
c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	455 serialized.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	456
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	457 Immediate Operands
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	458 ^^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	459
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	460 The immediate machine operands are untyped, 64-bit signed integers. The
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	461 example below shows an instance of the X86 ``MOV32ri`` instruction that has an
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	462 immediate machine operand ``-42``:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	463
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	464 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	465
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	466 $eax = MOV32ri -42
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	467
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	468 An immediate operand is also used to represent a subregister index when the
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	469 machine instruction has one of the following opcodes:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	470
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	471 - ``EXTRACT_SUBREG``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	472
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	473 - ``INSERT_SUBREG``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	474
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	475 - ``REG_SEQUENCE``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	476
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	477 - ``SUBREG_TO_REG``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	478
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	479 In case this is true, the Machine Operand is printed according to the target.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	480
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	481 For example:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	482
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	483 In AArch64RegisterInfo.td:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	484
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	485 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	486
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	487 def sub_32 : SubRegIndex<32>;
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	488
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	489 If the third operand is an immediate with the value ``15`` (target-dependent
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	490 value), based on the instruction's opcode and the operand's index the operand
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	491 will be printed as ``%subreg.sub_32``:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	492
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	493 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	494
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	495 %1:gpr64 = SUBREG_TO_REG 0, %0, %subreg.sub_32
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	496
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	497 For integers > 64bit, we use a special machine operand, ``MO_CImmediate``,
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	498 which stores the immediate in a ``ConstantInt`` using an ``APInt`` (LLVM's
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	499 arbitrary precision integers).
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	500
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	501 .. TODO: Describe the FPIMM immediate operands.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	502
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	503 .. _register-operands:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	504
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	505 Register Operands
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	506 ^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	507
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	508 The :ref:`register <registers>` primitive is used to represent the register
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	509 machine operands. The register operands can also have optional
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	510 :ref:`register flags <register-flags>`,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	511 :ref:`a subregister index <subregister-indices>`,
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	512 and a reference to the tied register operand.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	513 The full syntax of a register operand is shown below:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	514
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	515 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	516
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	517 [<flags>] <register> [ :<subregister-idx-name> ] [ (tied-def <tied-op>) ]
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	518
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	519 This example shows an instance of the X86 ``XOR32rr`` instruction that has
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	520 5 register operands with different register flags:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	521
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	522 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	523
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	524 dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	525
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	526 .. _register-flags:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	527
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	528 Register Flags
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	529 ~~~~~~~~~~~~~~
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	530
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	531 The table below shows all of the possible register flags along with the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	532 corresponding internal ``llvm::RegState`` representation:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	533
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	534 .. list-table::
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	535 :header-rows: 1
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	536
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	537 * - Flag
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	538 - Internal Value
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	539
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	540 * - ``implicit``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	541 - ``RegState::Implicit``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	542
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	543 * - ``implicit-def``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	544 - ``RegState::ImplicitDefine``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	545
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	546 * - ``def``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	547 - ``RegState::Define``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	548
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	549 * - ``dead``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	550 - ``RegState::Dead``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	551
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	552 * - ``killed``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	553 - ``RegState::Kill``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	554
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	555 * - ``undef``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	556 - ``RegState::Undef``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	557
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	558 * - ``internal``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	559 - ``RegState::InternalRead``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	560
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	561 * - ``early-clobber``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	562 - ``RegState::EarlyClobber``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	563
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	564 * - ``debug-use``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	565 - ``RegState::Debug``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	566
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	567 * - ``renamable``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	568 - ``RegState::Renamable``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	569
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	570 .. _subregister-indices:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	571
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	572 Subregister Indices
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	573 ~~~~~~~~~~~~~~~~~~~
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	574
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	575 The register machine operands can reference a portion of a register by using
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	576 the subregister indices. The example below shows an instance of the ``COPY``
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	577 pseudo instruction that uses the X86 ``sub_8bit`` subregister index to copy 8
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	578 lower bits from the 32-bit virtual register 0 to the 8-bit virtual register 1:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	579
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	580 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	581
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	582 %1 = COPY %0:sub_8bit
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	583
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	584 The names of the subregister indices are target specific, and are typically
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	585 defined in the target's ``*RegisterInfo.td`` file.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	586
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	587 Constant Pool Indices
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	588 ^^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	589
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	590 A constant pool index (CPI) operand is printed using its index in the
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	591 function's ``MachineConstantPool`` and an offset.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	592
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	593 For example, a CPI with the index 1 and offset 8:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	594
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	595 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	596
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	597 %1:gr64 = MOV64ri %const.1 + 8
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	598
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	599 For a CPI with the index 0 and offset -12:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	600
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	601 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	602
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	603 %1:gr64 = MOV64ri %const.0 - 12
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	604
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	605 A constant pool entry is bound to a LLVM IR ``Constant`` or a target-specific
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	606 ``MachineConstantPoolValue``. When serializing all the function's constants the
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	607 following format is used:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	608
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	609 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	610
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	611 constants:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	612 - id: <index>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	613 value: <value>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	614 alignment: <alignment>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	615 isTargetSpecific: <target-specific>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	616
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	617 where ``<index>`` is a 32-bit unsigned integer, ``<value>`` is a `LLVM IR Constant
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	618 <https://www.llvm.org/docs/LangRef.html#constants>`_, alignment is a 32-bit
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	619 unsigned integer, and ``<target-specific>`` is either true or false.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	620
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	621 Example:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	622
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	623 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	624
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	625 constants:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	626 - id: 0
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	627 value: 'double 3.250000e+00'
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	628 alignment: 8
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	629 - id: 1
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	630 value: 'g-(LPC0+8)'
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	631 alignment: 4
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	632 isTargetSpecific: true
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	633
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	634 Global Value Operands
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	635 ^^^^^^^^^^^^^^^^^^^^^
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	636
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	637 The global value machine operands reference the global values from the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	638 :ref:`embedded LLVM IR module <embedded-module>`.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	639 The example below shows an instance of the X86 ``MOV64rm`` instruction that has
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	640 a global value operand named ``G``:
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	641
120 1172e4bd9c6f update 4.0.0 mir3636 parents: 95 diff changeset	642 .. code-block:: text
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	643
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	644 $rax = MOV64rm $rip, 1, _, @G, _
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	645
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	646 The named global values are represented using an identifier with the '@' prefix.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	647 If the identifier doesn't match the regular expression
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	648 `[-a-zA-Z$._][-a-zA-Z$._0-9]*`, then this identifier must be quoted.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	649
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	650 The unnamed global values are represented using an unsigned numeric value with
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	651 the '@' prefix, like in the following examples: ``@0``, ``@989``.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	652
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	653 Target-dependent Index Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	654 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	655
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	656 A target index operand is a target-specific index and an offset. The
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	657 target-specific index is printed using target-specific names and a positive or
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	658 negative offset.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	659
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	660 For example, the ``amdgpu-constdata-start`` is associated with the index ``0``
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	661 in the AMDGPU backend. So if we have a target index operand with the index 0
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	662 and the offset 8:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	663
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	664 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	665
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	666 $sgpr2 = S_ADD_U32 _, target-index(amdgpu-constdata-start) + 8, implicit-def _, implicit-def _
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	667
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	668 Jump-table Index Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	669 ^^^^^^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	670
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	671 A jump-table index operand with the index 0 is printed as following:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	672
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	673 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	674
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	675 tBR_JTr killed $r0, %jump-table.0
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	676
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	677 A machine jump-table entry contains a list of ``MachineBasicBlocks``. When serializing all the function's jump-table entries, the following format is used:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	678
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	679 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	680
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	681 jumpTable:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	682 kind: <kind>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	683 entries:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	684 - id: <index>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	685 blocks: [ <bbreference>, <bbreference>, ... ]
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	686
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	687 where ``<kind>`` is describing how the jump table is represented and emitted (plain address, relocations, PIC, etc.), and each ``<index>`` is a 32-bit unsigned integer and ``blocks`` contains a list of :ref:`machine basic block references <block-references>`.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	688
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	689 Example:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	690
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	691 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	692
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	693 jumpTable:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	694 kind: inline
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	695 entries:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	696 - id: 0
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	697 blocks: [ '%bb.3', '%bb.9', '%bb.4.d3' ]
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	698 - id: 1
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	699 blocks: [ '%bb.7', '%bb.7', '%bb.4.d3', '%bb.5' ]
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	700
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	701 External Symbol Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	702 ^^^^^^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	703
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	704 An external symbol operand is represented using an identifier with the ``&``
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	705 prefix. The identifier is surrounded with ""'s and escaped if it has any
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	706 special non-printable characters in it.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	707
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	708 Example:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	709
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	710 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	711
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	712 CALL64pcrel32 &__stack_chk_fail, csr_64, implicit $rsp, implicit-def $rsp
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	713
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	714 MCSymbol Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	715 ^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	716
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	717 A MCSymbol operand is holding a pointer to a ``MCSymbol``. For the limitations
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	718 of this operand in MIR, see :ref:`limitations <limitations>`.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	719
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	720 The syntax is:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	721
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	722 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	723
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	724 EH_LABEL <mcsymbol Ltmp1>
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	725
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	726 CFIIndex Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	727 ^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	728
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	729 A CFI Index operand is holding an index into a per-function side-table,
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	730 ``MachineFunction::getFrameInstructions()``, which references all the frame
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	731 instructions in a ``MachineFunction``. A ``CFI_INSTRUCTION`` may look like it
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	732 contains multiple operands, but the only operand it contains is the CFI Index.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	733 The other operands are tracked by the ``MCCFIInstruction`` object.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	734
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	735 The syntax is:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	736
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	737 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	738
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	739 CFI_INSTRUCTION offset $w30, -16
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	740
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	741 which may be emitted later in the MC layer as:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	742
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	743 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	744
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	745 .cfi_offset w30, -16
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	746
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	747 IntrinsicID Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	748 ^^^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	749
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	750 An Intrinsic ID operand contains a generic intrinsic ID or a target-specific ID.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	751
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	752 The syntax for the ``returnaddress`` intrinsic is:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	753
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	754 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	755
147 c2174574ed3a LLVM 10 Shinji KONO <kono@ie.u-ryukyu.ac.jp> parents: 134 diff changeset	756 $x0 = COPY intrinsic(@llvm.returnaddress)
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	757
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	758 Predicate Operands
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	759 ^^^^^^^^^^^^^^^^^^
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	760
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	761 A Predicate operand contains an IR predicate from ``CmpInst::Predicate``, like
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	762 ``ICMP_EQ``, etc.
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	763
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	764 For an int eq predicate ``ICMP_EQ``, the syntax is:
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	765
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	766 .. code-block:: text
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	767
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	768 %2:gpr(s32) = G_ICMP intpred(eq), %0, %1
3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	769
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	770 .. TODO: Describe the parsers default behaviour when optional YAML attributes
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	771 are missing.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	772 .. TODO: Describe the syntax for virtual register YAML definitions.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	773 .. TODO: Describe the machine function's YAML flag attributes.
134 3a76565eade5 update 5.0.1 mir3636 parents: 121 diff changeset	774 .. TODO: Describe the syntax for the register mask machine operands.
95 afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	775 .. TODO: Describe the frame information YAML mapping.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	776 .. TODO: Describe the syntax of the stack object machine operands and their
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	777 YAML definitions.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	778 .. TODO: Describe the syntax of the block address machine operands.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	779 .. TODO: Describe the syntax of the metadata machine operands, and the
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	780 instructions debug location attribute.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	781 .. TODO: Describe the syntax of the register live out machine operands.
afa8332a0e37 LLVM 3.8 Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> parents: diff changeset	782 .. TODO: Describe the syntax of the machine memory operands.

Mercurial > hg > CbC > CbC_llvm

annotate docs/MIRLangRef.rst @ 148:63bd29f05246