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annotate lib/Target/XCore/XCoreISelDAGToDAG.cpp @ 148:63bd29f05246

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merged
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 19:46:37 +0900
parents c2174574ed3a
children
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1 //===-- XCoreISelDAGToDAG.cpp - A dag to dag inst selector for XCore ------===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file defines an instruction selector for the XCore target.
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10 //
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11 //===----------------------------------------------------------------------===//
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12
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13 #include "XCore.h"
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14 #include "XCoreTargetMachine.h"
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15 #include "llvm/CodeGen/MachineFrameInfo.h"
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16 #include "llvm/CodeGen/MachineFunction.h"
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17 #include "llvm/CodeGen/MachineInstrBuilder.h"
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18 #include "llvm/CodeGen/MachineRegisterInfo.h"
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19 #include "llvm/CodeGen/SelectionDAG.h"
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20 #include "llvm/CodeGen/SelectionDAGISel.h"
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21 #include "llvm/CodeGen/TargetLowering.h"
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22 #include "llvm/IR/CallingConv.h"
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23 #include "llvm/IR/Constants.h"
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24 #include "llvm/IR/DerivedTypes.h"
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25 #include "llvm/IR/Function.h"
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26 #include "llvm/IR/Intrinsics.h"
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27 #include "llvm/IR/LLVMContext.h"
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28 #include "llvm/Support/Debug.h"
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29 #include "llvm/Support/ErrorHandling.h"
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30 #include "llvm/Support/raw_ostream.h"
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31 using namespace llvm;
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32
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33 /// XCoreDAGToDAGISel - XCore specific code to select XCore machine
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34 /// instructions for SelectionDAG operations.
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35 ///
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36 namespace {
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37 class XCoreDAGToDAGISel : public SelectionDAGISel {
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38
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39 public:
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40 XCoreDAGToDAGISel(XCoreTargetMachine &TM, CodeGenOpt::Level OptLevel)
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41 : SelectionDAGISel(TM, OptLevel) {}
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42
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43 void Select(SDNode *N) override;
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44 bool tryBRIND(SDNode *N);
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45
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46 /// getI32Imm - Return a target constant with the specified value, of type
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47 /// i32.
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48 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) {
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49 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
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50 }
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51
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52 inline bool immMskBitp(SDNode *inN) const {
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53 ConstantSDNode *N = cast<ConstantSDNode>(inN);
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54 uint32_t value = (uint32_t)N->getZExtValue();
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55 if (!isMask_32(value)) {
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56 return false;
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57 }
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58 int msksize = 32 - countLeadingZeros(value);
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59 return (msksize >= 1 && msksize <= 8) ||
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60 msksize == 16 || msksize == 24 || msksize == 32;
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61 }
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62
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63 // Complex Pattern Selectors.
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64 bool SelectADDRspii(SDValue Addr, SDValue &Base, SDValue &Offset);
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65
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66 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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67 std::vector<SDValue> &OutOps) override;
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68
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69 StringRef getPassName() const override {
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70 return "XCore DAG->DAG Pattern Instruction Selection";
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71 }
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72
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73 // Include the pieces autogenerated from the target description.
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74 #include "XCoreGenDAGISel.inc"
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75 };
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76 } // end anonymous namespace
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77
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78 /// createXCoreISelDag - This pass converts a legalized DAG into a
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79 /// XCore-specific DAG, ready for instruction scheduling.
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80 ///
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81 FunctionPass *llvm::createXCoreISelDag(XCoreTargetMachine &TM,
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82 CodeGenOpt::Level OptLevel) {
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83 return new XCoreDAGToDAGISel(TM, OptLevel);
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84 }
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85
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86 bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Addr, SDValue &Base,
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87 SDValue &Offset) {
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88 FrameIndexSDNode *FIN = nullptr;
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89 if ((FIN = dyn_cast<FrameIndexSDNode>(Addr))) {
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90 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
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91 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
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92 return true;
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93 }
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94 if (Addr.getOpcode() == ISD::ADD) {
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95 ConstantSDNode *CN = nullptr;
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96 if ((FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
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97 && (CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
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98 && (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
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99 // Constant positive word offset from frame index
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100 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
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101 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr),
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102 MVT::i32);
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103 return true;
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104 }
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105 }
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106 return false;
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107 }
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108
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109 bool XCoreDAGToDAGISel::
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110 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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111 std::vector<SDValue> &OutOps) {
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112 SDValue Reg;
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113 switch (ConstraintID) {
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114 default: return true;
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115 case InlineAsm::Constraint_m: // Memory.
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116 switch (Op.getOpcode()) {
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117 default: return true;
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118 case XCoreISD::CPRelativeWrapper:
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119 Reg = CurDAG->getRegister(XCore::CP, MVT::i32);
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120 break;
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121 case XCoreISD::DPRelativeWrapper:
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122 Reg = CurDAG->getRegister(XCore::DP, MVT::i32);
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123 break;
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124 }
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125 }
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126 OutOps.push_back(Reg);
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127 OutOps.push_back(Op.getOperand(0));
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128 return false;
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129 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
130
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
131 void XCoreDAGToDAGISel::Select(SDNode *N) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 SDLoc dl(N);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 switch (N->getOpcode()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 default: break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 case ISD::Constant: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 uint64_t Val = cast<ConstantSDNode>(N)->getZExtValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 if (immMskBitp(N)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 // Transformation function: get the size of a mask
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 // Look for the first non-zero bit
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
140 SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
141 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
142 MVT::i32, MskSize));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
143 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 else if (!isUInt<16>(Val)) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
146 SDValue CPIdx = CurDAG->getTargetConstantPool(
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
147 ConstantInt::get(Type::getInt32Ty(*CurDAG->getContext()), Val),
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
148 getTargetLowering()->getPointerTy(CurDAG->getDataLayout()));
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 MVT::Other, CPIdx,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 CurDAG->getEntryNode());
147
c2174574ed3a LLVM 10
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 134
diff changeset
152 MachineMemOperand *MemOp =
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
153 MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF),
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
154 MachineMemOperand::MOLoad, 4, 4);
147
c2174574ed3a LLVM 10
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 134
diff changeset
155 CurDAG->setNodeMemRefs(cast<MachineSDNode>(node), {MemOp});
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
156 ReplaceNode(N, node);
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
157 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 case XCoreISD::LADD: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 N->getOperand(2) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
164 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
165 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
166 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 case XCoreISD::LSUB: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 N->getOperand(2) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
171 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
172 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
173 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 case XCoreISD::MACCU: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 N->getOperand(2), N->getOperand(3) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
178 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
179 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
180 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 case XCoreISD::MACCS: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 N->getOperand(2), N->getOperand(3) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
185 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
186 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
187 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 case XCoreISD::LMUL: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 N->getOperand(2), N->getOperand(3) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
192 ReplaceNode(N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
193 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
194 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 case XCoreISD::CRC8: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
198 ReplaceNode(N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
199 MVT::i32, Ops));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
200 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 case ISD::BRIND:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
203 if (tryBRIND(N))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
204 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 }
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
208 SelectCode(N);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 /// Given a chain return a new chain where any appearance of Old is replaced
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 /// by New. There must be at most one instruction between Old and Chain and
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
213 /// this instruction must be a TokenFactor. Returns an empty SDValue if
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 /// these conditions don't hold.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 static SDValue
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 replaceInChain(SelectionDAG *CurDAG, SDValue Chain, SDValue Old, SDValue New)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 if (Chain == Old)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 return New;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 if (Chain->getOpcode() != ISD::TokenFactor)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 SmallVector<SDValue, 8> Ops;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 bool found = false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224 for (unsigned i = 0, e = Chain->getNumOperands(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 if (Chain->getOperand(i) == Old) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 Ops.push_back(New);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 found = true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 Ops.push_back(Chain->getOperand(i));
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 if (!found)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 return SDValue();
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
234 return CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, Ops);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
237 bool XCoreDAGToDAGISel::tryBRIND(SDNode *N) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 SDLoc dl(N);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 // (brind (int_xcore_checkevent (addr)))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 SDValue Chain = N->getOperand(0);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 SDValue Addr = N->getOperand(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN)
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
243 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 unsigned IntNo = cast<ConstantSDNode>(Addr->getOperand(1))->getZExtValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 if (IntNo != Intrinsic::xcore_checkevent)
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
246 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 SDValue nextAddr = Addr->getOperand(2);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 SDValue CheckEventChainOut(Addr.getNode(), 1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 if (!CheckEventChainOut.use_empty()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 // If the chain out of the checkevent intrinsic is an operand of the
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 // indirect branch or used in a TokenFactor which is the operand of the
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 // indirect branch then build a new chain which uses the chain coming into
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 // the checkevent intrinsic instead.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 SDValue CheckEventChainIn = Addr->getOperand(0);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 SDValue NewChain = replaceInChain(CurDAG, Chain, CheckEventChainOut,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 CheckEventChainIn);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 if (!NewChain.getNode())
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
258 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 Chain = NewChain;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 // Enable events on the thread using setsr 1 and then disable them immediately
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
262 // after with clrsr 1. If any resources owned by the thread are ready an event
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263 // will be taken. If no resource is ready we branch to the address which was
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 // the operand to the checkevent intrinsic.
95
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265 SDValue constOne = getI32Imm(1, dl);
0
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266 SDValue Glue =
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267 SDValue(CurDAG->getMachineNode(XCore::SETSR_branch_u6, dl, MVT::Glue,
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268 constOne, Chain), 0);
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269 Glue =
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270 SDValue(CurDAG->getMachineNode(XCore::CLRSR_branch_u6, dl, MVT::Glue,
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271 constOne, Glue), 0);
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272 if (nextAddr->getOpcode() == XCoreISD::PCRelativeWrapper &&
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273 nextAddr->getOperand(0)->getOpcode() == ISD::TargetBlockAddress) {
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274 CurDAG->SelectNodeTo(N, XCore::BRFU_lu6, MVT::Other,
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275 nextAddr->getOperand(0), Glue);
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276 return true;
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277 }
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278 CurDAG->SelectNodeTo(N, XCore::BAU_1r, MVT::Other, nextAddr, Glue);
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279 return true;
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280 }