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150
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
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3 ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10 %s
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4
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5 define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
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6 ; GFX9-LABEL: load_1d:
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7 ; GFX9: ; %bb.0: ; %main_body
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8 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
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9 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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10 ; GFX9-NEXT: ; return to shader part epilog
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11 ;
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12 ; GFX10-LABEL: load_1d:
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13 ; GFX10: ; %bb.0: ; %main_body
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14 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
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15 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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16 ; GFX10-NEXT: ; return to shader part epilog
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17 main_body:
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18 %s = extractelement <2 x i16> %coords, i32 0
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19 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
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20 ret <4 x float> %v
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21 }
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22
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23 define amdgpu_ps <4 x float> @load_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
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24 ; GFX9-LABEL: load_2d:
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25 ; GFX9: ; %bb.0: ; %main_body
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26 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
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27 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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28 ; GFX9-NEXT: ; return to shader part epilog
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29 ;
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30 ; GFX10-LABEL: load_2d:
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31 ; GFX10: ; %bb.0: ; %main_body
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32 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
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33 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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34 ; GFX10-NEXT: ; return to shader part epilog
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35 main_body:
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36 %s = extractelement <2 x i16> %coords, i32 0
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37 %t = extractelement <2 x i16> %coords, i32 1
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38 %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
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39 ret <4 x float> %v
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40 }
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41
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42 define amdgpu_ps <4 x float> @load_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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43 ; GFX9-LABEL: load_3d:
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44 ; GFX9: ; %bb.0: ; %main_body
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45 ; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
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46 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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47 ; GFX9-NEXT: ; return to shader part epilog
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48 ;
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49 ; GFX10-LABEL: load_3d:
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50 ; GFX10: ; %bb.0: ; %main_body
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51 ; GFX10-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
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52 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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53 ; GFX10-NEXT: ; return to shader part epilog
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54 main_body:
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55 %s = extractelement <2 x i16> %coords_lo, i32 0
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56 %t = extractelement <2 x i16> %coords_lo, i32 1
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57 %r = extractelement <2 x i16> %coords_hi, i32 0
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58 %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
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59 ret <4 x float> %v
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60 }
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61
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62 define amdgpu_ps <4 x float> @load_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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63 ; GFX9-LABEL: load_cube:
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64 ; GFX9: ; %bb.0: ; %main_body
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65 ; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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66 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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67 ; GFX9-NEXT: ; return to shader part epilog
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68 ;
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69 ; GFX10-LABEL: load_cube:
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70 ; GFX10: ; %bb.0: ; %main_body
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71 ; GFX10-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
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72 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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73 ; GFX10-NEXT: ; return to shader part epilog
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74 main_body:
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75 %s = extractelement <2 x i16> %coords_lo, i32 0
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76 %t = extractelement <2 x i16> %coords_lo, i32 1
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77 %slice = extractelement <2 x i16> %coords_hi, i32 0
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78 %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
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79 ret <4 x float> %v
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80 }
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81
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82 define amdgpu_ps <4 x float> @load_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
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83 ; GFX9-LABEL: load_1darray:
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84 ; GFX9: ; %bb.0: ; %main_body
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85 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
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86 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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87 ; GFX9-NEXT: ; return to shader part epilog
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88 ;
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89 ; GFX10-LABEL: load_1darray:
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90 ; GFX10: ; %bb.0: ; %main_body
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91 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
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92 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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93 ; GFX10-NEXT: ; return to shader part epilog
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94 main_body:
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95 %s = extractelement <2 x i16> %coords, i32 0
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96 %slice = extractelement <2 x i16> %coords, i32 1
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97 %v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
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98 ret <4 x float> %v
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99 }
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100
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101 define amdgpu_ps <4 x float> @load_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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102 ; GFX9-LABEL: load_2darray:
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103 ; GFX9: ; %bb.0: ; %main_body
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104 ; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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105 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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106 ; GFX9-NEXT: ; return to shader part epilog
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107 ;
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108 ; GFX10-LABEL: load_2darray:
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109 ; GFX10: ; %bb.0: ; %main_body
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110 ; GFX10-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
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111 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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112 ; GFX10-NEXT: ; return to shader part epilog
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113 main_body:
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114 %s = extractelement <2 x i16> %coords_lo, i32 0
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115 %t = extractelement <2 x i16> %coords_lo, i32 1
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116 %slice = extractelement <2 x i16> %coords_hi, i32 0
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117 %v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
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118 ret <4 x float> %v
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119 }
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120
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121 define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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122 ; GFX9-LABEL: load_2dmsaa:
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123 ; GFX9: ; %bb.0: ; %main_body
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124 ; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
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125 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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126 ; GFX9-NEXT: ; return to shader part epilog
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127 ;
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128 ; GFX10-LABEL: load_2dmsaa:
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129 ; GFX10: ; %bb.0: ; %main_body
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130 ; GFX10-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16
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131 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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132 ; GFX10-NEXT: ; return to shader part epilog
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133 main_body:
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134 %s = extractelement <2 x i16> %coords_lo, i32 0
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135 %t = extractelement <2 x i16> %coords_lo, i32 1
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136 %fragid = extractelement <2 x i16> %coords_hi, i32 0
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137 %v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
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138 ret <4 x float> %v
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139 }
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140
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141 define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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142 ; GFX9-LABEL: load_2darraymsaa:
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143 ; GFX9: ; %bb.0: ; %main_body
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144 ; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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145 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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146 ; GFX9-NEXT: ; return to shader part epilog
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147 ;
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148 ; GFX10-LABEL: load_2darraymsaa:
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149 ; GFX10: ; %bb.0: ; %main_body
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150 ; GFX10-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16
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151 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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152 ; GFX10-NEXT: ; return to shader part epilog
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153 main_body:
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154 %s = extractelement <2 x i16> %coords_lo, i32 0
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155 %t = extractelement <2 x i16> %coords_lo, i32 1
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156 %slice = extractelement <2 x i16> %coords_hi, i32 0
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157 %fragid = extractelement <2 x i16> %coords_hi, i32 1
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158 %v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
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159 ret <4 x float> %v
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160 }
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161
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162 define amdgpu_ps <4 x float> @load_mip_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
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163 ; GFX9-LABEL: load_mip_1d:
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164 ; GFX9: ; %bb.0: ; %main_body
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165 ; GFX9-NEXT: image_load_mip v[0:3], v0, s[0:7] dmask:0xf unorm a16
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166 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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167 ; GFX9-NEXT: ; return to shader part epilog
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168 ;
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169 ; GFX10-LABEL: load_mip_1d:
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170 ; GFX10: ; %bb.0: ; %main_body
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171 ; GFX10-NEXT: image_load_mip v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
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172 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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173 ; GFX10-NEXT: ; return to shader part epilog
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174 main_body:
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175 %s = extractelement <2 x i16> %coords, i32 0
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176 %mip = extractelement <2 x i16> %coords, i32 1
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177 %v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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178 ret <4 x float> %v
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179 }
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180
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181 define amdgpu_ps <4 x float> @load_mip_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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182 ; GFX9-LABEL: load_mip_2d:
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183 ; GFX9: ; %bb.0: ; %main_body
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184 ; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
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185 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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186 ; GFX9-NEXT: ; return to shader part epilog
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187 ;
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188 ; GFX10-LABEL: load_mip_2d:
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189 ; GFX10: ; %bb.0: ; %main_body
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190 ; GFX10-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
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191 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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192 ; GFX10-NEXT: ; return to shader part epilog
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193 main_body:
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194 %s = extractelement <2 x i16> %coords_lo, i32 0
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195 %t = extractelement <2 x i16> %coords_lo, i32 1
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196 %mip = extractelement <2 x i16> %coords_hi, i32 0
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197 %v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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198 ret <4 x float> %v
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199 }
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200
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201 define amdgpu_ps <4 x float> @load_mip_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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202 ; GFX9-LABEL: load_mip_3d:
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203 ; GFX9: ; %bb.0: ; %main_body
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204 ; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
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205 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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206 ; GFX9-NEXT: ; return to shader part epilog
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207 ;
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208 ; GFX10-LABEL: load_mip_3d:
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209 ; GFX10: ; %bb.0: ; %main_body
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210 ; GFX10-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
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211 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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212 ; GFX10-NEXT: ; return to shader part epilog
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213 main_body:
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214 %s = extractelement <2 x i16> %coords_lo, i32 0
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215 %t = extractelement <2 x i16> %coords_lo, i32 1
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216 %r = extractelement <2 x i16> %coords_hi, i32 0
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217 %mip = extractelement <2 x i16> %coords_hi, i32 1
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218 %v = call <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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219 ret <4 x float> %v
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220 }
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221
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222 define amdgpu_ps <4 x float> @load_mip_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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223 ; GFX9-LABEL: load_mip_cube:
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224 ; GFX9: ; %bb.0: ; %main_body
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225 ; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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226 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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227 ; GFX9-NEXT: ; return to shader part epilog
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228 ;
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229 ; GFX10-LABEL: load_mip_cube:
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230 ; GFX10: ; %bb.0: ; %main_body
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231 ; GFX10-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
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232 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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233 ; GFX10-NEXT: ; return to shader part epilog
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234 main_body:
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235 %s = extractelement <2 x i16> %coords_lo, i32 0
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236 %t = extractelement <2 x i16> %coords_lo, i32 1
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237 %slice = extractelement <2 x i16> %coords_hi, i32 0
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238 %mip = extractelement <2 x i16> %coords_hi, i32 1
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239 %v = call <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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240 ret <4 x float> %v
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241 }
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242
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243 define amdgpu_ps <4 x float> @load_mip_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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244 ; GFX9-LABEL: load_mip_1darray:
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245 ; GFX9: ; %bb.0: ; %main_body
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246 ; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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247 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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248 ; GFX9-NEXT: ; return to shader part epilog
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249 ;
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250 ; GFX10-LABEL: load_mip_1darray:
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251 ; GFX10: ; %bb.0: ; %main_body
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252 ; GFX10-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
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253 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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254 ; GFX10-NEXT: ; return to shader part epilog
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255 main_body:
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256 %s = extractelement <2 x i16> %coords_lo, i32 0
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257 %slice = extractelement <2 x i16> %coords_lo, i32 1
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258 %mip = extractelement <2 x i16> %coords_hi, i32 0
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259 %v = call <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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260 ret <4 x float> %v
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|
261 }
|
|
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262
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|
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263 define amdgpu_ps <4 x float> @load_mip_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
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264 ; GFX9-LABEL: load_mip_2darray:
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265 ; GFX9: ; %bb.0: ; %main_body
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266 ; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da
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267 ; GFX9-NEXT: s_waitcnt vmcnt(0)
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268 ; GFX9-NEXT: ; return to shader part epilog
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269 ;
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270 ; GFX10-LABEL: load_mip_2darray:
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271 ; GFX10: ; %bb.0: ; %main_body
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272 ; GFX10-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
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273 ; GFX10-NEXT: s_waitcnt vmcnt(0)
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274 ; GFX10-NEXT: ; return to shader part epilog
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275 main_body:
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276 %s = extractelement <2 x i16> %coords_lo, i32 0
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277 %t = extractelement <2 x i16> %coords_lo, i32 1
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278 %slice = extractelement <2 x i16> %coords_hi, i32 0
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279 %mip = extractelement <2 x i16> %coords_hi, i32 1
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280 %v = call <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
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|
|
281 ret <4 x float> %v
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|
|
282 }
|
|
|
283
|
|
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284 define amdgpu_ps void @store_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
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285 ; GFX9-LABEL: store_1d:
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286 ; GFX9: ; %bb.0: ; %main_body
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287 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16
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|
288 ; GFX9-NEXT: s_endpgm
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289 ;
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290 ; GFX10-LABEL: store_1d:
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291 ; GFX10: ; %bb.0: ; %main_body
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292 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
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293 ; GFX10-NEXT: s_endpgm
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|
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294 main_body:
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|
295 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
296 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
297 ret void
|
|
|
298 }
|
|
|
299
|
|
|
300 define amdgpu_ps void @store_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
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|
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301 ; GFX9-LABEL: store_2d:
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302 ; GFX9: ; %bb.0: ; %main_body
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|
303 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16
|
|
|
304 ; GFX9-NEXT: s_endpgm
|
|
|
305 ;
|
|
|
306 ; GFX10-LABEL: store_2d:
|
|
|
307 ; GFX10: ; %bb.0: ; %main_body
|
|
|
308 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
|
|
|
309 ; GFX10-NEXT: s_endpgm
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|
|
310 main_body:
|
|
|
311 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
312 %t = extractelement <2 x i16> %coords, i32 1
|
|
|
313 call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
314 ret void
|
|
|
315 }
|
|
|
316
|
|
|
317 define amdgpu_ps void @store_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
318 ; GFX9-LABEL: store_3d:
|
|
|
319 ; GFX9: ; %bb.0: ; %main_body
|
|
|
320 ; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16
|
|
|
321 ; GFX9-NEXT: s_endpgm
|
|
|
322 ;
|
|
|
323 ; GFX10-LABEL: store_3d:
|
|
|
324 ; GFX10: ; %bb.0: ; %main_body
|
|
|
325 ; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
|
|
|
326 ; GFX10-NEXT: s_endpgm
|
|
|
327 main_body:
|
|
|
328 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
329 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
330 %r = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
331 call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
332 ret void
|
|
|
333 }
|
|
|
334
|
|
|
335 define amdgpu_ps void @store_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
336 ; GFX9-LABEL: store_cube:
|
|
|
337 ; GFX9: ; %bb.0: ; %main_body
|
|
|
338 ; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
339 ; GFX9-NEXT: s_endpgm
|
|
|
340 ;
|
|
|
341 ; GFX10-LABEL: store_cube:
|
|
|
342 ; GFX10: ; %bb.0: ; %main_body
|
|
|
343 ; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
|
|
|
344 ; GFX10-NEXT: s_endpgm
|
|
|
345 main_body:
|
|
|
346 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
347 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
348 %slice = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
349 call void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
350 ret void
|
|
|
351 }
|
|
|
352
|
|
|
353 define amdgpu_ps void @store_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
|
|
|
354 ; GFX9-LABEL: store_1darray:
|
|
|
355 ; GFX9: ; %bb.0: ; %main_body
|
|
|
356 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 da
|
|
|
357 ; GFX9-NEXT: s_endpgm
|
|
|
358 ;
|
|
|
359 ; GFX10-LABEL: store_1darray:
|
|
|
360 ; GFX10: ; %bb.0: ; %main_body
|
|
|
361 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
|
|
|
362 ; GFX10-NEXT: s_endpgm
|
|
|
363 main_body:
|
|
|
364 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
365 %slice = extractelement <2 x i16> %coords, i32 1
|
|
|
366 call void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
367 ret void
|
|
|
368 }
|
|
|
369
|
|
|
370 define amdgpu_ps void @store_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
371 ; GFX9-LABEL: store_2darray:
|
|
|
372 ; GFX9: ; %bb.0: ; %main_body
|
|
|
373 ; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
374 ; GFX9-NEXT: s_endpgm
|
|
|
375 ;
|
|
|
376 ; GFX10-LABEL: store_2darray:
|
|
|
377 ; GFX10: ; %bb.0: ; %main_body
|
|
|
378 ; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
|
|
|
379 ; GFX10-NEXT: s_endpgm
|
|
|
380 main_body:
|
|
|
381 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
382 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
383 %slice = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
384 call void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
385 ret void
|
|
|
386 }
|
|
|
387
|
|
|
388 define amdgpu_ps void @store_2dmsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
389 ; GFX9-LABEL: store_2dmsaa:
|
|
|
390 ; GFX9: ; %bb.0: ; %main_body
|
|
|
391 ; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16
|
|
|
392 ; GFX9-NEXT: s_endpgm
|
|
|
393 ;
|
|
|
394 ; GFX10-LABEL: store_2dmsaa:
|
|
|
395 ; GFX10: ; %bb.0: ; %main_body
|
|
|
396 ; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16
|
|
|
397 ; GFX10-NEXT: s_endpgm
|
|
|
398 main_body:
|
|
|
399 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
400 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
401 %fragid = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
402 call void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
403 ret void
|
|
|
404 }
|
|
|
405
|
|
|
406 define amdgpu_ps void @store_2darraymsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
407 ; GFX9-LABEL: store_2darraymsaa:
|
|
|
408 ; GFX9: ; %bb.0: ; %main_body
|
|
|
409 ; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
410 ; GFX9-NEXT: s_endpgm
|
|
|
411 ;
|
|
|
412 ; GFX10-LABEL: store_2darraymsaa:
|
|
|
413 ; GFX10: ; %bb.0: ; %main_body
|
|
|
414 ; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16
|
|
|
415 ; GFX10-NEXT: s_endpgm
|
|
|
416 main_body:
|
|
|
417 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
418 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
419 %slice = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
420 %fragid = extractelement <2 x i16> %coords_hi, i32 1
|
|
|
421 call void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
422 ret void
|
|
|
423 }
|
|
|
424
|
|
|
425 define amdgpu_ps void @store_mip_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
|
|
|
426 ; GFX9-LABEL: store_mip_1d:
|
|
|
427 ; GFX9: ; %bb.0: ; %main_body
|
|
|
428 ; GFX9-NEXT: image_store_mip v[0:3], v4, s[0:7] dmask:0xf unorm a16
|
|
|
429 ; GFX9-NEXT: s_endpgm
|
|
|
430 ;
|
|
|
431 ; GFX10-LABEL: store_mip_1d:
|
|
|
432 ; GFX10: ; %bb.0: ; %main_body
|
|
|
433 ; GFX10-NEXT: image_store_mip v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
434 ; GFX10-NEXT: s_endpgm
|
|
|
435 main_body:
|
|
|
436 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
437 %mip = extractelement <2 x i16> %coords, i32 1
|
|
|
438 call void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
439 ret void
|
|
|
440 }
|
|
|
441
|
|
|
442 define amdgpu_ps void @store_mip_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
443 ; GFX9-LABEL: store_mip_2d:
|
|
|
444 ; GFX9: ; %bb.0: ; %main_body
|
|
|
445 ; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16
|
|
|
446 ; GFX9-NEXT: s_endpgm
|
|
|
447 ;
|
|
|
448 ; GFX10-LABEL: store_mip_2d:
|
|
|
449 ; GFX10: ; %bb.0: ; %main_body
|
|
|
450 ; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
|
|
|
451 ; GFX10-NEXT: s_endpgm
|
|
|
452 main_body:
|
|
|
453 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
454 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
455 %mip = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
456 call void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
457 ret void
|
|
|
458 }
|
|
|
459
|
|
|
460 define amdgpu_ps void @store_mip_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
461 ; GFX9-LABEL: store_mip_3d:
|
|
|
462 ; GFX9: ; %bb.0: ; %main_body
|
|
|
463 ; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16
|
|
|
464 ; GFX9-NEXT: s_endpgm
|
|
|
465 ;
|
|
|
466 ; GFX10-LABEL: store_mip_3d:
|
|
|
467 ; GFX10: ; %bb.0: ; %main_body
|
|
|
468 ; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
|
|
|
469 ; GFX10-NEXT: s_endpgm
|
|
|
470 main_body:
|
|
|
471 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
472 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
473 %r = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
474 %mip = extractelement <2 x i16> %coords_hi, i32 1
|
|
|
475 call void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
476 ret void
|
|
|
477 }
|
|
|
478
|
|
|
479 define amdgpu_ps void @store_mip_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
480 ; GFX9-LABEL: store_mip_cube:
|
|
|
481 ; GFX9: ; %bb.0: ; %main_body
|
|
|
482 ; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
483 ; GFX9-NEXT: s_endpgm
|
|
|
484 ;
|
|
|
485 ; GFX10-LABEL: store_mip_cube:
|
|
|
486 ; GFX10: ; %bb.0: ; %main_body
|
|
|
487 ; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
|
|
|
488 ; GFX10-NEXT: s_endpgm
|
|
|
489 main_body:
|
|
|
490 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
491 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
492 %slice = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
493 %mip = extractelement <2 x i16> %coords_hi, i32 1
|
|
|
494 call void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
495 ret void
|
|
|
496 }
|
|
|
497
|
|
|
498 define amdgpu_ps void @store_mip_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
499 ; GFX9-LABEL: store_mip_1darray:
|
|
|
500 ; GFX9: ; %bb.0: ; %main_body
|
|
|
501 ; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
502 ; GFX9-NEXT: s_endpgm
|
|
|
503 ;
|
|
|
504 ; GFX10-LABEL: store_mip_1darray:
|
|
|
505 ; GFX10: ; %bb.0: ; %main_body
|
|
|
506 ; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
|
|
|
507 ; GFX10-NEXT: s_endpgm
|
|
|
508 main_body:
|
|
|
509 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
510 %slice = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
511 %mip = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
512 call void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
513 ret void
|
|
|
514 }
|
|
|
515
|
|
|
516 define amdgpu_ps void @store_mip_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
|
|
|
517 ; GFX9-LABEL: store_mip_2darray:
|
|
|
518 ; GFX9: ; %bb.0: ; %main_body
|
|
|
519 ; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da
|
|
|
520 ; GFX9-NEXT: s_endpgm
|
|
|
521 ;
|
|
|
522 ; GFX10-LABEL: store_mip_2darray:
|
|
|
523 ; GFX10: ; %bb.0: ; %main_body
|
|
|
524 ; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
|
|
|
525 ; GFX10-NEXT: s_endpgm
|
|
|
526 main_body:
|
|
|
527 %s = extractelement <2 x i16> %coords_lo, i32 0
|
|
|
528 %t = extractelement <2 x i16> %coords_lo, i32 1
|
|
|
529 %slice = extractelement <2 x i16> %coords_hi, i32 0
|
|
|
530 %mip = extractelement <2 x i16> %coords_hi, i32 1
|
|
|
531 call void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
532 ret void
|
|
|
533 }
|
|
|
534
|
|
|
535 define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
536 ; GFX9-LABEL: getresinfo_1d:
|
|
|
537 ; GFX9: ; %bb.0: ; %main_body
|
|
|
538 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
|
|
|
539 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
540 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
541 ;
|
|
|
542 ; GFX10-LABEL: getresinfo_1d:
|
|
|
543 ; GFX10: ; %bb.0: ; %main_body
|
|
|
544 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
545 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
546 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
547 main_body:
|
|
|
548 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
549 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
550 ret <4 x float> %v
|
|
|
551 }
|
|
|
552
|
|
|
553 define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
554 ; GFX9-LABEL: getresinfo_2d:
|
|
|
555 ; GFX9: ; %bb.0: ; %main_body
|
|
|
556 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
|
|
|
557 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
558 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
559 ;
|
|
|
560 ; GFX10-LABEL: getresinfo_2d:
|
|
|
561 ; GFX10: ; %bb.0: ; %main_body
|
|
|
562 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
|
|
|
563 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
564 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
565 main_body:
|
|
|
566 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
567 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
568 ret <4 x float> %v
|
|
|
569 }
|
|
|
570
|
|
|
571 define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
572 ; GFX9-LABEL: getresinfo_3d:
|
|
|
573 ; GFX9: ; %bb.0: ; %main_body
|
|
|
574 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
|
|
|
575 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
576 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
577 ;
|
|
|
578 ; GFX10-LABEL: getresinfo_3d:
|
|
|
579 ; GFX10: ; %bb.0: ; %main_body
|
|
|
580 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
|
|
|
581 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
582 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
583 main_body:
|
|
|
584 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
585 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
586 ret <4 x float> %v
|
|
|
587 }
|
|
|
588
|
|
|
589 define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
590 ; GFX9-LABEL: getresinfo_cube:
|
|
|
591 ; GFX9: ; %bb.0: ; %main_body
|
|
|
592 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
|
|
|
593 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
594 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
595 ;
|
|
|
596 ; GFX10-LABEL: getresinfo_cube:
|
|
|
597 ; GFX10: ; %bb.0: ; %main_body
|
|
|
598 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
|
|
|
599 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
600 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
601 main_body:
|
|
|
602 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
603 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
604 ret <4 x float> %v
|
|
|
605 }
|
|
|
606
|
|
|
607 define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
608 ; GFX9-LABEL: getresinfo_1darray:
|
|
|
609 ; GFX9: ; %bb.0: ; %main_body
|
|
|
610 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
|
|
|
611 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
612 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
613 ;
|
|
|
614 ; GFX10-LABEL: getresinfo_1darray:
|
|
|
615 ; GFX10: ; %bb.0: ; %main_body
|
|
|
616 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
|
|
|
617 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
618 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
619 main_body:
|
|
|
620 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
621 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
622 ret <4 x float> %v
|
|
|
623 }
|
|
|
624
|
|
|
625 define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
626 ; GFX9-LABEL: getresinfo_2darray:
|
|
|
627 ; GFX9: ; %bb.0: ; %main_body
|
|
|
628 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
|
|
|
629 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
630 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
631 ;
|
|
|
632 ; GFX10-LABEL: getresinfo_2darray:
|
|
|
633 ; GFX10: ; %bb.0: ; %main_body
|
|
|
634 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
|
|
|
635 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
636 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
637 main_body:
|
|
|
638 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
639 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
640 ret <4 x float> %v
|
|
|
641 }
|
|
|
642
|
|
|
643 define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
644 ; GFX9-LABEL: getresinfo_2dmsaa:
|
|
|
645 ; GFX9: ; %bb.0: ; %main_body
|
|
|
646 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
|
|
|
647 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
648 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
649 ;
|
|
|
650 ; GFX10-LABEL: getresinfo_2dmsaa:
|
|
|
651 ; GFX10: ; %bb.0: ; %main_body
|
|
|
652 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16
|
|
|
653 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
654 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
655 main_body:
|
|
|
656 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
657 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
658 ret <4 x float> %v
|
|
|
659 }
|
|
|
660
|
|
|
661 define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
662 ; GFX9-LABEL: getresinfo_2darraymsaa:
|
|
|
663 ; GFX9: ; %bb.0: ; %main_body
|
|
|
664 ; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
|
|
|
665 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
666 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
667 ;
|
|
|
668 ; GFX10-LABEL: getresinfo_2darraymsaa:
|
|
|
669 ; GFX10: ; %bb.0: ; %main_body
|
|
|
670 ; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16
|
|
|
671 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
672 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
673 main_body:
|
|
|
674 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
675 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
676 ret <4 x float> %v
|
|
|
677 }
|
|
|
678
|
|
|
679 define amdgpu_ps float @load_1d_V1(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
680 ; GFX9-LABEL: load_1d_V1:
|
|
|
681 ; GFX9: ; %bb.0: ; %main_body
|
|
|
682 ; GFX9-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm a16
|
|
|
683 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
684 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
685 ;
|
|
|
686 ; GFX10-LABEL: load_1d_V1:
|
|
|
687 ; GFX10: ; %bb.0: ; %main_body
|
|
|
688 ; GFX10-NEXT: image_load v0, v0, s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
689 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
690 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
691 main_body:
|
|
|
692 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
693 %v = call float @llvm.amdgcn.image.load.1d.f32.i16(i32 8, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
694 ret float %v
|
|
|
695 }
|
|
|
696
|
|
|
697 define amdgpu_ps <2 x float> @load_1d_V2(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
698 ; GFX9-LABEL: load_1d_V2:
|
|
|
699 ; GFX9: ; %bb.0: ; %main_body
|
|
|
700 ; GFX9-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm a16
|
|
|
701 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
702 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
703 ;
|
|
|
704 ; GFX10-LABEL: load_1d_V2:
|
|
|
705 ; GFX10: ; %bb.0: ; %main_body
|
|
|
706 ; GFX10-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
707 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
708 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
709 main_body:
|
|
|
710 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
711 %v = call <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32 9, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
712 ret <2 x float> %v
|
|
|
713 }
|
|
|
714
|
|
|
715 define amdgpu_ps void @store_1d_V1(<8 x i32> inreg %rsrc, float %vdata, <2 x i16> %coords) {
|
|
|
716 ; GFX9-LABEL: store_1d_V1:
|
|
|
717 ; GFX9: ; %bb.0: ; %main_body
|
|
|
718 ; GFX9-NEXT: image_store v0, v1, s[0:7] dmask:0x2 unorm a16
|
|
|
719 ; GFX9-NEXT: s_endpgm
|
|
|
720 ;
|
|
|
721 ; GFX10-LABEL: store_1d_V1:
|
|
|
722 ; GFX10: ; %bb.0: ; %main_body
|
|
|
723 ; GFX10-NEXT: image_store v0, v1, s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
724 ; GFX10-NEXT: s_endpgm
|
|
|
725 main_body:
|
|
|
726 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
727 call void @llvm.amdgcn.image.store.1d.f32.i16(float %vdata, i32 2, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
728 ret void
|
|
|
729 }
|
|
|
730
|
|
|
731 define amdgpu_ps void @store_1d_V2(<8 x i32> inreg %rsrc, <2 x float> %vdata, <2 x i16> %coords) {
|
|
|
732 ; GFX9-LABEL: store_1d_V2:
|
|
|
733 ; GFX9: ; %bb.0: ; %main_body
|
|
|
734 ; GFX9-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc unorm a16
|
|
|
735 ; GFX9-NEXT: s_endpgm
|
|
|
736 ;
|
|
|
737 ; GFX10-LABEL: store_1d_V2:
|
|
|
738 ; GFX10: ; %bb.0: ; %main_body
|
|
|
739 ; GFX10-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc dim:SQ_RSRC_IMG_1D unorm a16
|
|
|
740 ; GFX10-NEXT: s_endpgm
|
|
|
741 main_body:
|
|
|
742 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
743 call void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float> %vdata, i32 12, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
744 ret void
|
|
|
745 }
|
|
|
746
|
|
|
747 define amdgpu_ps <4 x float> @load_1d_glc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
748 ; GFX9-LABEL: load_1d_glc:
|
|
|
749 ; GFX9: ; %bb.0: ; %main_body
|
|
|
750 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc a16
|
|
|
751 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
752 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
753 ;
|
|
|
754 ; GFX10-LABEL: load_1d_glc:
|
|
|
755 ; GFX10: ; %bb.0: ; %main_body
|
|
|
756 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16
|
|
|
757 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
758 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
759 main_body:
|
|
|
760 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
761 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
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|
|
762 ret <4 x float> %v
|
|
|
763 }
|
|
|
764
|
|
|
765 define amdgpu_ps <4 x float> @load_1d_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
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|
|
766 ; GFX9-LABEL: load_1d_slc:
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|
|
767 ; GFX9: ; %bb.0: ; %main_body
|
|
|
768 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm slc a16
|
|
|
769 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
770 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
771 ;
|
|
|
772 ; GFX10-LABEL: load_1d_slc:
|
|
|
773 ; GFX10: ; %bb.0: ; %main_body
|
|
|
774 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16
|
|
|
775 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
776 ; GFX10-NEXT: ; return to shader part epilog
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|
|
777 main_body:
|
|
|
778 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
779 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
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|
|
780 ret <4 x float> %v
|
|
|
781 }
|
|
|
782
|
|
|
783 define amdgpu_ps <4 x float> @load_1d_glc_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
|
|
|
784 ; GFX9-LABEL: load_1d_glc_slc:
|
|
|
785 ; GFX9: ; %bb.0: ; %main_body
|
|
|
786 ; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc slc a16
|
|
|
787 ; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
|
788 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
789 ;
|
|
|
790 ; GFX10-LABEL: load_1d_glc_slc:
|
|
|
791 ; GFX10: ; %bb.0: ; %main_body
|
|
|
792 ; GFX10-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16
|
|
|
793 ; GFX10-NEXT: s_waitcnt vmcnt(0)
|
|
|
794 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
795 main_body:
|
|
|
796 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
797 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
|
|
|
798 ret <4 x float> %v
|
|
|
799 }
|
|
|
800
|
|
|
801 define amdgpu_ps void @store_1d_glc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
|
|
|
802 ; GFX9-LABEL: store_1d_glc:
|
|
|
803 ; GFX9: ; %bb.0: ; %main_body
|
|
|
804 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc a16
|
|
|
805 ; GFX9-NEXT: s_endpgm
|
|
|
806 ;
|
|
|
807 ; GFX10-LABEL: store_1d_glc:
|
|
|
808 ; GFX10: ; %bb.0: ; %main_body
|
|
|
809 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16
|
|
|
810 ; GFX10-NEXT: s_endpgm
|
|
|
811 main_body:
|
|
|
812 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
813 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
|
|
|
814 ret void
|
|
|
815 }
|
|
|
816
|
|
|
817 define amdgpu_ps void @store_1d_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
|
|
|
818 ; GFX9-LABEL: store_1d_slc:
|
|
|
819 ; GFX9: ; %bb.0: ; %main_body
|
|
|
820 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm slc a16
|
|
|
821 ; GFX9-NEXT: s_endpgm
|
|
|
822 ;
|
|
|
823 ; GFX10-LABEL: store_1d_slc:
|
|
|
824 ; GFX10: ; %bb.0: ; %main_body
|
|
|
825 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16
|
|
|
826 ; GFX10-NEXT: s_endpgm
|
|
|
827 main_body:
|
|
|
828 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
829 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
|
|
|
830 ret void
|
|
|
831 }
|
|
|
832
|
|
|
833 define amdgpu_ps void @store_1d_glc_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
|
|
|
834 ; GFX9-LABEL: store_1d_glc_slc:
|
|
|
835 ; GFX9: ; %bb.0: ; %main_body
|
|
|
836 ; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc slc a16
|
|
|
837 ; GFX9-NEXT: s_endpgm
|
|
|
838 ;
|
|
|
839 ; GFX10-LABEL: store_1d_glc_slc:
|
|
|
840 ; GFX10: ; %bb.0: ; %main_body
|
|
|
841 ; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16
|
|
|
842 ; GFX10-NEXT: s_endpgm
|
|
|
843 main_body:
|
|
|
844 %s = extractelement <2 x i16> %coords, i32 0
|
|
|
845 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
|
|
|
846 ret void
|
|
|
847 }
|
|
|
848
|
|
|
849 define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) #0 {
|
|
|
850 ; GFX9-LABEL: getresinfo_dmask0:
|
|
|
851 ; GFX9: ; %bb.0: ; %main_body
|
|
|
852 ; GFX9-NEXT: ; return to shader part epilog
|
|
|
853 ;
|
|
|
854 ; GFX10-LABEL: getresinfo_dmask0:
|
|
|
855 ; GFX10: ; %bb.0: ; %main_body
|
|
|
856 ; GFX10-NEXT: ; return to shader part epilog
|
|
|
857 main_body:
|
|
|
858 %mip = extractelement <2 x i16> %coords, i32 0
|
|
|
859 %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
|
|
|
860 ret <4 x float> %r
|
|
|
861 }
|
|
|
862
|
|
|
863 declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #1
|
|
|
864 declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
865 declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
866 declare <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
867 declare <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
868 declare <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
869 declare <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
870 declare <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
871
|
|
|
872 declare <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
873 declare <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
874 declare <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
875 declare <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
876 declare <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
877 declare <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
878
|
|
|
879 declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #0
|
|
|
880 declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
881 declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
882 declare void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
883 declare void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
884 declare void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
885 declare void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
886 declare void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
887
|
|
|
888 declare void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
889 declare void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
890 declare void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
891 declare void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
892 declare void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
893 declare void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
|
|
|
894
|
|
|
895 declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
896 declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
897 declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
898 declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
899 declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
900 declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
901 declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
902 declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
|
|
|
903
|
|
|
904 declare float @llvm.amdgcn.image.load.1d.f32.i16(i32, i16, <8 x i32>, i32, i32) #1
|
|
|
905 declare float @llvm.amdgcn.image.load.2d.f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
|
|
|
906 declare <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32, i16, <8 x i32>, i32, i32) #1
|
|
|
907 declare void @llvm.amdgcn.image.store.1d.f32.i16(float, i32, i16, <8 x i32>, i32, i32) #0
|
|
|
908 declare void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float>, i32, i16, <8 x i32>, i32, i32) #0
|
|
|
909
|
|
|
910 attributes #0 = { nounwind }
|
|
|
911 attributes #1 = { nounwind readonly }
|
|
|
912 attributes #2 = { nounwind readnone }
|
