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1 //===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9
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10 #include "MipsABIInfo.h"
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11 #include "MipsRegisterInfo.h"
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12 #include "llvm/ADT/StringRef.h"
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13 #include "llvm/ADT/StringSwitch.h"
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14 #include "llvm/MC/MCTargetOptions.h"
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15
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16 using namespace llvm;
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17
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18 namespace {
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19 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
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20
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21 static const MCPhysReg Mips64IntRegs[8] = {
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22 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
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23 Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
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24 }
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25
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26 ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
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27 if (IsO32())
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28 return makeArrayRef(O32IntRegs);
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29 if (IsN32() || IsN64())
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30 return makeArrayRef(Mips64IntRegs);
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31 llvm_unreachable("Unhandled ABI");
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32 }
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33
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95
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34 ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
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35 if (IsO32())
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36 return makeArrayRef(O32IntRegs);
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37 if (IsN32() || IsN64())
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38 return makeArrayRef(Mips64IntRegs);
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39 llvm_unreachable("Unhandled ABI");
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40 }
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41
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42 unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
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43 if (IsO32())
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44 return CC != CallingConv::Fast ? 16 : 0;
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45 if (IsN32() || IsN64() || IsEABI())
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46 return 0;
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47 llvm_unreachable("Unhandled ABI");
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48 }
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49
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50 MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
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51 const MCTargetOptions &Options) {
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52 if (Options.getABIName().startswith("o32"))
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53 return MipsABIInfo::O32();
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54 else if (Options.getABIName().startswith("n32"))
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55 return MipsABIInfo::N32();
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56 else if (Options.getABIName().startswith("n64"))
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57 return MipsABIInfo::N64();
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58 else if (Options.getABIName().startswith("eabi"))
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59 return MipsABIInfo::EABI();
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60 else if (!Options.getABIName().empty())
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61 llvm_unreachable("Unknown ABI option for MIPS");
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62
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63 // FIXME: This shares code with the selectMipsCPU routine that's
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64 // used and not shared in a couple of other places. This needs unifying
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65 // at some level.
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66 if (CPU.empty() || CPU == "generic") {
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67 if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
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68 CPU = "mips32";
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69 else
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70 CPU = "mips64";
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71 }
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72
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73 return StringSwitch<MipsABIInfo>(CPU)
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74 .Case("mips1", MipsABIInfo::O32())
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75 .Case("mips2", MipsABIInfo::O32())
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76 .Case("mips32", MipsABIInfo::O32())
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77 .Case("mips32r2", MipsABIInfo::O32())
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78 .Case("mips32r3", MipsABIInfo::O32())
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79 .Case("mips32r5", MipsABIInfo::O32())
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80 .Case("mips32r6", MipsABIInfo::O32())
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81 .Case("mips3", MipsABIInfo::N64())
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82 .Case("mips4", MipsABIInfo::N64())
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83 .Case("mips5", MipsABIInfo::N64())
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84 .Case("mips64", MipsABIInfo::N64())
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85 .Case("mips64r2", MipsABIInfo::N64())
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86 .Case("mips64r3", MipsABIInfo::N64())
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87 .Case("mips64r5", MipsABIInfo::N64())
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88 .Case("mips64r6", MipsABIInfo::N64())
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89 .Case("octeon", MipsABIInfo::N64())
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90 .Default(MipsABIInfo::Unknown());
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91 }
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92
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93 unsigned MipsABIInfo::GetStackPtr() const {
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94 return ArePtrs64bit() ? Mips::SP_64 : Mips::SP;
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95 }
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96
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97 unsigned MipsABIInfo::GetFramePtr() const {
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98 return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
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99 }
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100
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101 unsigned MipsABIInfo::GetBasePtr() const {
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102 return ArePtrs64bit() ? Mips::S7_64 : Mips::S7;
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103 }
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104
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105 unsigned MipsABIInfo::GetNullPtr() const {
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106 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO;
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107 }
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108
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109 unsigned MipsABIInfo::GetZeroReg() const {
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110 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO;
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111 }
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112
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113 unsigned MipsABIInfo::GetPtrAdduOp() const {
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114 return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu;
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115 }
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116
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117 unsigned MipsABIInfo::GetPtrAddiuOp() const {
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118 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu;
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119 }
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120
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121 unsigned MipsABIInfo::GetGPRMoveOp() const {
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122 return ArePtrs64bit() ? Mips::OR64 : Mips::OR;
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123 }
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124
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125 unsigned MipsABIInfo::GetEhDataReg(unsigned I) const {
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126 static const unsigned EhDataReg[] = {
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127 Mips::A0, Mips::A1, Mips::A2, Mips::A3
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128 };
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129 static const unsigned EhDataReg64[] = {
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130 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64
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131 };
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132
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133 return IsN64() ? EhDataReg64[I] : EhDataReg[I];
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134 }
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135
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