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annotate lib/Target/Mips/MipsInstrInfo.cpp @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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1 //===-- MipsInstrInfo.cpp - Mips Instruction Information ------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains the Mips implementation of the TargetInstrInfo class.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "MipsInstrInfo.h"
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15 #include "InstPrinter/MipsInstPrinter.h"
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16 #include "MipsAnalyzeImmediate.h"
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17 #include "MipsMachineFunction.h"
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18 #include "MipsSubtarget.h"
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19 #include "llvm/ADT/STLExtras.h"
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20 #include "llvm/CodeGen/MachineInstrBuilder.h"
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21 #include "llvm/CodeGen/MachineRegisterInfo.h"
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22 #include "llvm/Support/ErrorHandling.h"
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23 #include "llvm/Support/TargetRegistry.h"
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24
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25 using namespace llvm;
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26
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27 #define GET_INSTRINFO_CTOR_DTOR
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28 #include "MipsGenInstrInfo.inc"
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29
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30 // Pin the vtable to this file.
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31 void MipsInstrInfo::anchor() {}
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32
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33 MipsInstrInfo::MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBr)
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34 : MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
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35 Subtarget(STI), UncondBrOpc(UncondBr) {}
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36
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37 const MipsInstrInfo *MipsInstrInfo::create(MipsSubtarget &STI) {
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38 if (STI.inMips16Mode())
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39 return llvm::createMips16InstrInfo(STI);
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40
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41 return llvm::createMipsSEInstrInfo(STI);
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42 }
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43
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44 bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const {
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45 return op.isImm() && op.getImm() == 0;
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46 }
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47
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48 /// insertNoop - If data hazard condition is found insert the target nop
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49 /// instruction.
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50 void MipsInstrInfo::
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51 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
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52 {
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53 DebugLoc DL;
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54 BuildMI(MBB, MI, DL, get(Mips::NOP));
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55 }
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56
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57 MachineMemOperand *MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI,
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58 unsigned Flag) const {
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59 MachineFunction &MF = *MBB.getParent();
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60 MachineFrameInfo &MFI = *MF.getFrameInfo();
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61 unsigned Align = MFI.getObjectAlignment(FI);
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62
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63 return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI),
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64 Flag, MFI.getObjectSize(FI), Align);
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65 }
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66
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67 //===----------------------------------------------------------------------===//
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68 // Branch Analysis
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69 //===----------------------------------------------------------------------===//
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70
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71 void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc,
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72 MachineBasicBlock *&BB,
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73 SmallVectorImpl<MachineOperand> &Cond) const {
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74 assert(getAnalyzableBrOpc(Opc) && "Not an analyzable branch");
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75 int NumOp = Inst->getNumExplicitOperands();
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76
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77 // for both int and fp branches, the last explicit operand is the
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78 // MBB.
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79 BB = Inst->getOperand(NumOp-1).getMBB();
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80 Cond.push_back(MachineOperand::CreateImm(Opc));
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81
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82 for (int i=0; i<NumOp-1; i++)
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83 Cond.push_back(Inst->getOperand(i));
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84 }
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85
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86 bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
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87 MachineBasicBlock *&TBB,
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88 MachineBasicBlock *&FBB,
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89 SmallVectorImpl<MachineOperand> &Cond,
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90 bool AllowModify) const {
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91 SmallVector<MachineInstr*, 2> BranchInstrs;
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92 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
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93
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94 return (BT == BT_None) || (BT == BT_Indirect);
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95 }
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96
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97 void
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98 MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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99 DebugLoc DL, ArrayRef<MachineOperand> Cond) const {
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100 unsigned Opc = Cond[0].getImm();
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101 const MCInstrDesc &MCID = get(Opc);
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102 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
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103
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104 for (unsigned i = 1; i < Cond.size(); ++i) {
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105 if (Cond[i].isReg())
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106 MIB.addReg(Cond[i].getReg());
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107 else if (Cond[i].isImm())
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108 MIB.addImm(Cond[i].getImm());
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109 else
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110 assert(true && "Cannot copy operand");
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111 }
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112 MIB.addMBB(TBB);
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113 }
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114
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115 unsigned MipsInstrInfo::InsertBranch(
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116 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
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117 ArrayRef<MachineOperand> Cond, DebugLoc DL) const {
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118 // Shouldn't be a fall through.
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119 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
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120
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121 // # of condition operands:
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122 // Unconditional branches: 0
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123 // Floating point branches: 1 (opc)
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124 // Int BranchZero: 2 (opc, reg)
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125 // Int Branch: 3 (opc, reg0, reg1)
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126 assert((Cond.size() <= 3) &&
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127 "# of Mips branch conditions must be <= 3!");
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128
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 // Two-way Conditional branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 if (FBB) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 BuildCondBr(MBB, TBB, DL, Cond);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 return 2;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 // One way branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 // Unconditional branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 if (Cond.empty())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 else // Conditional branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 BuildCondBr(MBB, TBB, DL, Cond);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 return 1;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
145 unsigned MipsInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 MachineBasicBlock::reverse_iterator FirstBr;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 unsigned removed;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 // Skip all the debug instructions.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 while (I != REnd && I->isDebugValue())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 ++I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 FirstBr = I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 // Up to 2 branches are removed.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 // Note that indirect branches are not removed.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
158 for (removed = 0; I != REnd && removed < 2; ++I, ++removed)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 if (!getAnalyzableBrOpc(I->getOpcode()))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 MBB.erase(I.base(), FirstBr.base());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 return removed;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 /// ReverseBranchCondition - Return the inverse opcode of the
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 /// specified Branch instruction.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
169 bool MipsInstrInfo::ReverseBranchCondition(
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
170 SmallVectorImpl<MachineOperand> &Cond) const {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 assert( (Cond.size() && Cond.size() <= 3) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 "Invalid Mips branch condition!");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 Cond[0].setImm(getOppositeBranchOpc(Cond[0].getImm()));
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
177 MipsInstrInfo::BranchType MipsInstrInfo::AnalyzeBranch(
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
178 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
179 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
180 SmallVectorImpl<MachineInstr *> &BranchInstrs) const {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 // Skip all the debug instructions.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 while (I != REnd && I->isDebugValue())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 ++I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 if (I == REnd || !isUnpredicatedTerminator(&*I)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 // This block ends with no branches (it just falls through to its succ).
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 // Leave TBB/FBB null.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
191 TBB = FBB = nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 return BT_NoBranch;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 MachineInstr *LastInst = &*I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 unsigned LastOpc = LastInst->getOpcode();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 BranchInstrs.push_back(LastInst);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 // Not an analyzable branch (e.g., indirect jump).
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 if (!getAnalyzableBrOpc(LastOpc))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 return LastInst->isIndirectBranch() ? BT_Indirect : BT_None;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 // Get the second to last instruction in the block.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 unsigned SecondLastOpc = 0;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
205 MachineInstr *SecondLastInst = nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 if (++I != REnd) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 SecondLastInst = &*I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 SecondLastOpc = getAnalyzableBrOpc(SecondLastInst->getOpcode());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 // Not an analyzable branch (must be an indirect jump).
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 if (isUnpredicatedTerminator(SecondLastInst) && !SecondLastOpc)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 return BT_None;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 // If there is only one terminator instruction, process it.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 if (!SecondLastOpc) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 // Unconditional branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 if (LastOpc == UncondBrOpc) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 TBB = LastInst->getOperand(0).getMBB();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 return BT_Uncond;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224 // Conditional branch
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 AnalyzeCondBr(LastInst, LastOpc, TBB, Cond);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 return BT_Cond;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 // If we reached here, there are two branches.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 // If there are three terminators, we don't know what sort of block this is.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 if (++I != REnd && isUnpredicatedTerminator(&*I))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 return BT_None;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 BranchInstrs.insert(BranchInstrs.begin(), SecondLastInst);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 // If second to last instruction is an unconditional branch,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 // analyze it and remove the last instruction.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 if (SecondLastOpc == UncondBrOpc) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 // Return if the last instruction cannot be removed.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 if (!AllowModify)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 return BT_None;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 TBB = SecondLastInst->getOperand(0).getMBB();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 LastInst->eraseFromParent();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 BranchInstrs.pop_back();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 return BT_Uncond;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 // Conditional branch followed by an unconditional branch.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 // The last one must be unconditional.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 if (LastOpc != UncondBrOpc)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 return BT_None;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 AnalyzeCondBr(SecondLastInst, SecondLastOpc, TBB, Cond);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 FBB = LastInst->getOperand(0).getMBB();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 return BT_CondUncond;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 /// Return the number of bytes of code the specified instruction may be.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 unsigned MipsInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
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262 switch (MI->getOpcode()) {
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263 default:
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264 return MI->getDesc().getSize();
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265 case TargetOpcode::INLINEASM: { // Inline Asm: Variable size.
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266 const MachineFunction *MF = MI->getParent()->getParent();
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267 const char *AsmStr = MI->getOperand(0).getSymbolName();
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268 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
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269 }
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270 case Mips::CONSTPOOL_ENTRY:
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271 // If this machine instr is a constant pool entry, its size is recorded as
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272 // operand #2.
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273 return MI->getOperand(2).getImm();
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274 }
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275 }
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276
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277 MachineInstrBuilder
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278 MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc,
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279 MachineBasicBlock::iterator I) const {
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280 MachineInstrBuilder MIB;
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281 MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
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282
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283 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J)
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284 MIB.addOperand(I->getOperand(J));
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285
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286 MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end());
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287 return MIB;
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288 }