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annotate test/CodeGen/AArch64/arm64-indexed-vector-ldst-2.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children c2174574ed3a
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s
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2
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3 ; This used to assert with "Overran sorted position" in AssignTopologicalOrder
54457678186b LLVM 3.6
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4 ; due to a cycle created in performPostLD1Combine.
54457678186b LLVM 3.6
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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7 target triple = "arm64-apple-ios7.0.0"
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8
54457678186b LLVM 3.6
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9 ; Function Attrs: nounwind ssp
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 define void @f(double* %P1) #0 {
54457678186b LLVM 3.6
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11 entry:
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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12 %arrayidx4 = getelementptr inbounds double, double* %P1, i64 1
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13 %0 = load double, double* %arrayidx4, align 8, !tbaa !1
afa8332a0e37 LLVM 3.8
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14 %1 = load double, double* %P1, align 8, !tbaa !1
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 %2 = insertelement <2 x double> undef, double %0, i32 0
54457678186b LLVM 3.6
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16 %3 = insertelement <2 x double> %2, double %1, i32 1
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17 %4 = fsub <2 x double> zeroinitializer, %3
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18 %5 = fmul <2 x double> undef, %4
54457678186b LLVM 3.6
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19 %6 = extractelement <2 x double> %5, i32 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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20 %cmp168 = fcmp olt double %6, undef
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 br i1 %cmp168, label %if.then172, label %return
54457678186b LLVM 3.6
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22
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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23 if.then172: ; preds = %cond.end90
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24 %7 = tail call i64 @llvm.objectsize.i64.p0i8(i8* undef, i1 false)
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25 br label %return
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26
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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27 return: ; preds = %if.then172, %cond.end90, %entry
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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28 ret void
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29 }
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54457678186b LLVM 3.6
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31 ; Function Attrs: nounwind readnone
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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32 declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) #1
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33
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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34 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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35 attributes #1 = { nounwind readnone }
54457678186b LLVM 3.6
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36
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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37 !1 = !{!2, !2, i64 0}
60c9769439b8 LLVM 3.7
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38 !2 = !{!"double", !3, i64 0}
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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39 !3 = !{!"omnipotent char", !4, i64 0}
60c9769439b8 LLVM 3.7
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40 !4 = !{!"Simple C/C++ TBAA"}