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annotate test/CodeGen/AArch64/arm64-memset-inline.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=arm64 | FileCheck %s
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2
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3 define void @t1(i8* nocapture %c) nounwind optsize {
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4 entry:
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5 ; CHECK-LABEL: t1:
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6 ; CHECK: str wzr, [x0, #8]
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7 ; CHECK: str xzr, [x0]
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8 call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false)
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9 ret void
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10 }
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11
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12 define void @t2() nounwind ssp {
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13 entry:
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14 ; CHECK-LABEL: t2:
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15 ; CHECK: strh wzr, [sp, #32]
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16 ; CHECK: stp xzr, xzr, [sp, #16]
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17 ; CHECK: str xzr, [sp, #8]
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18 %buf = alloca [26 x i8], align 1
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afa8332a0e37 LLVM 3.8
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19 %0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0
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20 call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i32 1, i1 false)
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21 call void @something(i8* %0) nounwind
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22 ret void
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23 }
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25 declare void @something(i8*) nounwind
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26 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
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27 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind