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annotate test/CodeGen/AArch64/arm64-misched-basic-A57.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; REQUIRES: asserts
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2 ;
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3 ; The Cortext-A57 machine model will avoid scheduling load instructions in
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4 ; succession because loads on the A57 have a latency of 4 cycles and they all
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 ; issue to the same pipeline. Instead, it will move other instructions between
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 ; the loads to avoid unnecessary stalls. The generic machine model schedules 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 ; loads consecutively for this case and will cause stalls.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 ;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 ; CHECK: ********** MI Scheduling **********
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11 ; CHECK: main:BB#2
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12 ; CHECK: LDR
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13 ; CHECK: Latency : 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14 ; CHECK: *** Final schedule for BB#2 ***
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 ; CHECK: LDR
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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16 ; CHECK: LDR
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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17 ; CHECK-NOT: LDR
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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18 ; CHECK: {{.*}}
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19 ; CHECK: ********** MI Scheduling **********
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20
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 @main.x = private unnamed_addr constant [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1], align 4
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22 @main.y = private unnamed_addr constant [8 x i32] [i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2], align 4
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23
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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24 ; Function Attrs: nounwind
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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25 define i32 @main() #0 {
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26 entry:
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27 %retval = alloca i32, align 4
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28 %x = alloca [8 x i32], align 4
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29 %y = alloca [8 x i32], align 4
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30 %i = alloca i32, align 4
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31 %xx = alloca i32, align 4
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32 %yy = alloca i32, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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33 store i32 0, i32* %retval
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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34 %0 = bitcast [8 x i32]* %x to i8*
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35 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([8 x i32]* @main.x to i8*), i64 32, i32 4, i1 false)
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36 %1 = bitcast [8 x i32]* %y to i8*
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37 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([8 x i32]* @main.y to i8*), i64 32, i32 4, i1 false)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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38 store i32 0, i32* %xx, align 4
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39 store i32 0, i32* %yy, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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40 store i32 0, i32* %i, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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41 br label %for.cond
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42
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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43 for.cond: ; preds = %for.inc, %entry
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44 %2 = load i32, i32* %i, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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45 %cmp = icmp slt i32 %2, 8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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46 br i1 %cmp, label %for.body, label %for.end
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47
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48 for.body: ; preds = %for.cond
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49 %3 = load i32, i32* %yy, align 4
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50 %4 = load i32, i32* %i, align 4
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51 %idxprom = sext i32 %4 to i64
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52 %arrayidx = getelementptr inbounds [8 x i32], [8 x i32]* %x, i32 0, i64 %idxprom
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53 %5 = load i32, i32* %arrayidx, align 4
77
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54 %add = add nsw i32 %5, 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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55 store i32 %add, i32* %xx, align 4
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56 %6 = load i32, i32* %xx, align 4
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57 %add1 = add nsw i32 %6, 12
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58 store i32 %add1, i32* %xx, align 4
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59 %7 = load i32, i32* %xx, align 4
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60 %add2 = add nsw i32 %7, 23
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61 store i32 %add2, i32* %xx, align 4
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62 %8 = load i32, i32* %xx, align 4
77
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63 %add3 = add nsw i32 %8, 34
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64 store i32 %add3, i32* %xx, align 4
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65 %9 = load i32, i32* %i, align 4
77
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66 %idxprom4 = sext i32 %9 to i64
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67 %arrayidx5 = getelementptr inbounds [8 x i32], [8 x i32]* %y, i32 0, i64 %idxprom4
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68 %10 = load i32, i32* %arrayidx5, align 4
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69
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70 %add4 = add nsw i32 %9, %add
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71 %add5 = add nsw i32 %10, %add1
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72 %add6 = add nsw i32 %add4, %add5
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73
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74 %add7 = add nsw i32 %9, %add3
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parents:
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75 %add8 = add nsw i32 %10, %add4
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76 %add9 = add nsw i32 %add7, %add8
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77
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78 %add10 = add nsw i32 %9, %add6
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79 %add11 = add nsw i32 %10, %add7
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80 %add12 = add nsw i32 %add10, %add11
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81
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82 %add13 = add nsw i32 %9, %add9
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83 %add14 = add nsw i32 %10, %add10
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parents:
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84 %add15 = add nsw i32 %add13, %add14
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85
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86 store i32 %add15, i32* %xx, align 4
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87
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88 %div = sdiv i32 %4, %5
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89
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90 store i32 %div, i32* %yy, align 4
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91
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92 br label %for.inc
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93
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94 for.inc: ; preds = %for.body
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95 %11 = load i32, i32* %i, align 4
77
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96 %inc = add nsw i32 %11, 1
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97 store i32 %inc, i32* %i, align 4
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98 br label %for.cond
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99
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100 for.end: ; preds = %for.cond
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101 %12 = load i32, i32* %xx, align 4
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102 %13 = load i32, i32* %yy, align 4
77
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103 %add67 = add nsw i32 %12, %13
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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104 ret i32 %add67
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105 }
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106
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107
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108 ; Function Attrs: nounwind
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109 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1
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110
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111 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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112 attributes #1 = { nounwind }