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annotate test/CodeGen/AArch64/br-undef-cond.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 60c9769439b8
children
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83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -verify-machineinstrs
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2
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3 ; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
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4
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5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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6 target triple = "arm64-apple-ios"
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7
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8 declare void @bar(i8*)
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9
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10 define void @foo(i8* %m, i32 %off0) {
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11 .thread1653:
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12 br i1 undef, label %0, label %.thread1880
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13
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14 %1 = icmp eq i32 undef, 0
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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15 %.not = xor i1 %1, true
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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16 %brmerge = or i1 %.not, undef
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17 br i1 %brmerge, label %.thread1880, label %.thread1705
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18
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19 .thread1705:
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20 ret void
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21
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22 .thread1880:
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23 %m1652.ph = phi i8* [ %m, %0 ], [ null, %.thread1653 ]
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24 call void @bar(i8* %m1652.ph)
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25 ret void
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26 }