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annotate test/CodeGen/AArch64/fast-isel-sdiv.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1 ; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
2 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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3
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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4 define i32 @sdiv_i32_exact(i32 %a) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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5 ; CHECK-LABEL: sdiv_i32_exact
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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6 ; CHECK: asr {{w[0-9]+}}, w0, #3
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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7 %1 = sdiv exact i32 %a, 8
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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8 ret i32 %1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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9 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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10
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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11 define i32 @sdiv_i32_pos(i32 %a) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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12 ; CHECK-LABEL: sdiv_i32_pos
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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13 ; CHECK: add [[REG1:w[0-9]+]], w0, #7
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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14 ; CHECK-NEXT: cmp w0, #0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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15 ; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
16 ; CHECK-NEXT: asr {{w[0-9]+}}, [[REG2]], #3
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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17 %1 = sdiv i32 %a, 8
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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18 ret i32 %1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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19 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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20
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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21 define i32 @sdiv_i32_neg(i32 %a) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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22 ; CHECK-LABEL: sdiv_i32_neg
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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23 ; CHECK: add [[REG1:w[0-9]+]], w0, #7
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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24 ; CHECK-NEXT: cmp w0, #0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
25 ; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
26 ; CHECK-NEXT: neg {{w[0-9]+}}, [[REG2]], asr #3
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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27 %1 = sdiv i32 %a, -8
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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28 ret i32 %1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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29 }
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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30
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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31 define i64 @sdiv_i64_exact(i64 %a) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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32 ; CHECK-LABEL: sdiv_i64_exact
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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33 ; CHECK: asr {{x[0-9]+}}, x0, #4
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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34 %1 = sdiv exact i64 %a, 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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35 ret i64 %1
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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36 }
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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37
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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38 define i64 @sdiv_i64_pos(i64 %a) {
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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39 ; CHECK-LABEL: sdiv_i64_pos
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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40 ; CHECK: add [[REG1:x[0-9]+]], x0, #15
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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41 ; CHECK-NEXT: cmp x0, #0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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42 ; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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43 ; CHECK-NEXT: asr {{x[0-9]+}}, [[REG2]], #4
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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44 %1 = sdiv i64 %a, 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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45 ret i64 %1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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46 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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47
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
48 define i64 @sdiv_i64_neg(i64 %a) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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49 ; CHECK-LABEL: sdiv_i64_neg
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
50 ; CHECK: add [[REG1:x[0-9]+]], x0, #15
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
51 ; CHECK-NEXT: cmp x0, #0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
52 ; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
53 ; CHECK-NEXT: neg {{x[0-9]+}}, [[REG2]], asr #4
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
54 %1 = sdiv i64 %a, -16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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55 ret i64 %1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
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56 }