annotate test/CodeGen/AArch64/setcc-takes-i32.ll @ 100:7d135dc70f03 LLVM 3.9

LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -o - %s | FileCheck %s
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3 ; Most important point here is that the promotion of the i1 works
95c75e76d11b LLVM 3.4
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4 ; correctly. Previously LLVM thought that i64 was the appropriate SetCC output,
95c75e76d11b LLVM 3.4
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5 ; which meant it proceded in two steps and produced an i64 -> i64 any_ext which
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6 ; couldn't be selected and faulted.
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8 ; It was expecting the smallest legal promotion of i1 to be the preferred SetCC
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 ; type, so we'll satisfy it (this actually arguably gives better code anyway,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 ; with flag-manipulation operations allowed to use W-registers).
95c75e76d11b LLVM 3.4
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12 declare {i64, i1} @llvm.umul.with.overflow.i64(i64, i64)
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14 define i64 @test_select(i64 %lhs, i64 %rhs) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 ; CHECK-LABEL: test_select:
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17 %res = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %lhs, i64 %rhs)
95c75e76d11b LLVM 3.4
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18 %flag = extractvalue {i64, i1} %res, 1
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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19 %retval = select i1 %flag, i64 %lhs, i64 %rhs
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20 ret i64 %retval
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21 ; CHECK: ret
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22 }