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annotate test/CodeGen/AMDGPU/copy-to-reg.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 803732b1fca8
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s
afa8332a0e37 LLVM 3.8
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s
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3
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4 ; Test that CopyToReg instructions don't have non-register operands prior
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5 ; to being emitted.
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7 ; Make sure this doesn't crash
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8 ; CHECK-LABEL: {{^}}copy_to_reg_frameindex:
afa8332a0e37 LLVM 3.8
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9 define void @copy_to_reg_frameindex(i32 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
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10 entry:
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11 %alloca = alloca [16 x i32]
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12 br label %loop
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13
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14 loop:
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15 %inc = phi i32 [0, %entry], [%inc.i, %loop]
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16 %ptr = getelementptr [16 x i32], [16 x i32]* %alloca, i32 0, i32 %inc
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17 store i32 %inc, i32* %ptr
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18 %inc.i = add i32 %inc, 1
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19 %cnd = icmp uge i32 %inc.i, 16
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20 br i1 %cnd, label %done, label %loop
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21
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22 done:
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23 %tmp0 = getelementptr [16 x i32], [16 x i32]* %alloca, i32 0, i32 0
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24 %tmp1 = load i32, i32* %tmp0
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25 store i32 %tmp1, i32 addrspace(1)* %out
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26 ret void
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27 }