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annotate test/CodeGen/AMDGPU/llvm.rint.f64.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 803732b1fca8
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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1 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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3 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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5 ; FUNC-LABEL: {{^}}rint_f64:
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6 ; CI: v_rndne_f64_e32
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8 ; SI-DAG: v_add_f64
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9 ; SI-DAG: v_add_f64
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10 ; SI-DAG v_cmp_gt_f64_e64
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11 ; SI: v_cndmask_b32
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12 ; SI: v_cndmask_b32
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13 ; SI: s_endpgm
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14 define void @rint_f64(double addrspace(1)* %out, double %in) {
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15 entry:
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16 %0 = call double @llvm.rint.f64(double %in)
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17 store double %0, double addrspace(1)* %out
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18 ret void
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19 }
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parents: 77
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21 ; FUNC-LABEL: {{^}}rint_v2f64:
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22 ; CI: v_rndne_f64_e32
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23 ; CI: v_rndne_f64_e32
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24 define void @rint_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
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25 entry:
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26 %0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %in)
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27 store <2 x double> %0, <2 x double> addrspace(1)* %out
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28 ret void
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29 }
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31 ; FUNC-LABEL: {{^}}rint_v4f64:
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32 ; CI: v_rndne_f64_e32
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33 ; CI: v_rndne_f64_e32
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34 ; CI: v_rndne_f64_e32
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35 ; CI: v_rndne_f64_e32
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36 define void @rint_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
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37 entry:
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38 %0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %in)
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39 store <4 x double> %0, <4 x double> addrspace(1)* %out
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40 ret void
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41 }
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44 declare double @llvm.rint.f64(double) #0
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45 declare <2 x double> @llvm.rint.v2f64(<2 x double>) #0
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46 declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0