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annotate test/CodeGen/AMDGPU/llvm.rint.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
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2 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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5 ; FUNC-LABEL: {{^}}rint_f32:
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6 ; R600: RNDNE
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7
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8 ; SI: v_rndne_f32_e32
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9 define void @rint_f32(float addrspace(1)* %out, float %in) {
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10 entry:
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11 %0 = call float @llvm.rint.f32(float %in) #0
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12 store float %0, float addrspace(1)* %out
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13 ret void
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14 }
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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16 ; FUNC-LABEL: {{^}}rint_v2f32:
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17 ; R600: RNDNE
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18 ; R600: RNDNE
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20 ; SI: v_rndne_f32_e32
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21 ; SI: v_rndne_f32_e32
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22 define void @rint_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
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23 entry:
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24 %0 = call <2 x float> @llvm.rint.v2f32(<2 x float> %in) #0
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25 store <2 x float> %0, <2 x float> addrspace(1)* %out
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26 ret void
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27 }
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29 ; FUNC-LABEL: {{^}}rint_v4f32:
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30 ; R600: RNDNE
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31 ; R600: RNDNE
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32 ; R600: RNDNE
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33 ; R600: RNDNE
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35 ; SI: v_rndne_f32_e32
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36 ; SI: v_rndne_f32_e32
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37 ; SI: v_rndne_f32_e32
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parents: 77
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38 ; SI: v_rndne_f32_e32
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39 define void @rint_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
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40 entry:
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41 %0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %in) #0
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42 store <4 x float> %0, <4 x float> addrspace(1)* %out
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43 ret void
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44 }
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46 declare float @llvm.rint.f32(float) #0
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47 declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0
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48 declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0
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49
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50 attributes #0 = { nounwind readnone }