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annotate test/CodeGen/AMDGPU/si-annotate-cf.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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2 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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3
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4 ; FUNC-LABEL: {{^}}break_inserted_outside_of_loop:
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5
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6 ; SI: [[LOOP_LABEL:[A-Z0-9]+]]:
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7 ; Lowered break instructin:
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8 ; SI: s_or_b64
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9 ; Lowered Loop instruction:
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10 ; SI: s_andn2_b64
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11 ; s_cbranch_execnz [[LOOP_LABEL]]
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12 ; SI: s_endpgm
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13 define void @break_inserted_outside_of_loop(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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14 main_body:
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15 %0 = and i32 %a, %b
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16 %1 = trunc i32 %0 to i1
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17 br label %ENDIF
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18
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19 ENDLOOP:
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20 store i32 0, i32 addrspace(1)* %out
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21 ret void
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22
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23 ENDIF:
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24 br i1 %1, label %ENDLOOP, label %ENDIF
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25 }
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26
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27
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28 ; FUNC-LABEL: {{^}}phi_cond_outside_loop:
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29 ; FIXME: This could be folded into the s_or_b64 instruction
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30 ; SI: s_mov_b64 [[ZERO:s\[[0-9]+:[0-9]+\]]], 0
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31 ; SI: [[LOOP_LABEL:[A-Z0-9]+]]
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32 ; SI: v_cmp_ne_i32_e32 vcc, 0, v{{[0-9]+}}
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33
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34 ; SI_IF_BREAK instruction:
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35 ; SI: s_or_b64 [[BREAK:s\[[0-9]+:[0-9]+\]]], vcc, [[ZERO]]
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36
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37 ; SI_LOOP instruction:
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38 ; SI: s_andn2_b64 exec, exec, [[BREAK]]
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39 ; SI: s_cbranch_execnz [[LOOP_LABEL]]
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40 ; SI: s_endpgm
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41
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42 define void @phi_cond_outside_loop(i32 %a, i32 %b) {
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43 entry:
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44 %0 = icmp eq i32 %a , 0
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45 br i1 %0, label %if, label %else
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46
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47 if:
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48 br label %endif
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49
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50 else:
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51 %1 = icmp eq i32 %b, 0
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52 br label %endif
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53
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54 endif:
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55 %2 = phi i1 [0, %if], [%1, %else]
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56 br label %loop
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57
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58 loop:
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59 br i1 %2, label %exit, label %loop
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60
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61 exit:
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62 ret void
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63 }