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annotate test/CodeGen/PowerPC/mcm-3.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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95c75e76d11b LLVM 3.4
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1 ; RUN: llc -mcpu=pwr7 -O0 -code-model=medium <%s | FileCheck -check-prefix=MEDIUM %s
95c75e76d11b LLVM 3.4
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2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
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4 ; Test correct code generation for medium and large code model
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5 ; for loading and storing a file-scope static variable.
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7 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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8 target triple = "powerpc64-unknown-linux-gnu"
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10 @gi = global i32 5, align 4
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12 define signext i32 @test_file_static() nounwind {
95c75e76d11b LLVM 3.4
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13 entry:
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14 %0 = load i32, i32* @gi, align 4
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15 %inc = add nsw i32 %0, 1
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16 store i32 %inc, i32* @gi, align 4
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17 ret i32 %0
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18 }
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20 ; MEDIUM-LABEL: test_file_static:
95c75e76d11b LLVM 3.4
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21 ; MEDIUM: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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22 ; MEDIUM: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
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23 ; MEDIUM: lwz {{[0-9]+}}, 0([[REG2]])
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24 ; MEDIUM: stw {{[0-9]+}}, 0([[REG2]])
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25 ; MEDIUM: .type [[VAR]],@object
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26 ; MEDIUM: .data
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27 ; MEDIUM: .globl [[VAR]]
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28 ; MEDIUM: [[VAR]]:
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29 ; MEDIUM: .long 5
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31 ; LARGE-LABEL: test_file_static:
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32 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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33 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
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34 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
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35 ; LARGE: stw {{[0-9]+}}, 0([[REG2]])
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36 ; LARGE: [[VAR]]:
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37 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
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38 ; LARGE: .type [[VAR2]],@object
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39 ; LARGE: .data
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40 ; LARGE: .globl [[VAR2]]
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41 ; LARGE: [[VAR2]]:
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42 ; LARGE: .long 5
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