annotate test/CodeGen/PowerPC/mcm-7.ll @ 100:7d135dc70f03 LLVM 3.9

LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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1 ; RUN: llc -mcpu=pwr7 -O0 -code-model=medium < %s | FileCheck %s
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2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large < %s | FileCheck %s
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4 ; Test correct code generation for medium and large code model
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5 ; for loading a function address.
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7 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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8 target triple = "powerpc64-unknown-linux-gnu"
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10 define i8* @test_fnaddr() nounwind {
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11 entry:
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12 %func = alloca i32 (i32)*, align 8
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13 store i32 (i32)* @foo, i32 (i32)** %func, align 8
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14 %0 = load i32 (i32)*, i32 (i32)** %func, align 8
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15 %1 = bitcast i32 (i32)* %0 to i8*
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16 ret i8* %1
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17 }
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19 declare signext i32 @foo(i32 signext)
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21 ; CHECK-LABEL: test_fnaddr:
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22 ; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
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23 ; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
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24 ; CHECK: .section .toc
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25 ; CHECK: .LC[[TOCNUM]]:
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26 ; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}